R4F24278NVFQU Renesas Electronics America, R4F24278NVFQU Datasheet - Page 599

• Manufacturer Part Number: R4F24278NVFQU
• Description: MCU 512K/48K 2.7-5.5V 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24278NVFQU

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, Smart Card, SPI, SSU, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 98
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

H8S/2427, H8S/2427R, H8S/2425 Group
• P15/DACK1/DACK3/PO13/TIOCB1/TCLKC/SSI0-A
Notes: 1. TIOCB1 input when MD3 to MD0 = B'0000 or B'01xx and IOB3 to IOB0 = B'10xx.
REJ09B0565-0100 Rev. 1.00
Jul 22, 2010
SSU
settings
DMCOMMD
SAE1
SAE
TPU
channel 1
settings
P15DDR
NDER13
Pin
function
The pin function is switched as shown below according to the combination of bit DMCOMMD
in MDLCFGCR, bit SAE1 in DMABCRH, and bit SAE in DMAECRS1 of the DMAC, TPU
channel 1 settings (by bits MD3 to MD0 in TMDR_1, bits IOB3 to IOB0 in TIOR_1, and bits
CCLR1 and CCLR0 in TCR_1), bits TPSC2 to TPSC0 in TCR_0, TCR_2, TCR_4, and
TCR_5, bit NDER13 in NDERH of the PPG, bits MSS and BIDE in SSCRH, bit SSUMS in
SSCRL, and bits TE and RE in SSER of the SSU, bits SSI0S1 and SSI0S0 in PFCR5, and bit
P15DDR.
2. TCLKC input when the setting for either TCR_0 or TCR_2 is TPSC2 to TPSC0 = B'111,
3. SSI0-A input when SCS0S1 and SCS0S0 = B'00 in PFCR5. Do not set up for TPU
4. SSI0-A output when SCS0S1 and PPI0-A = B'00 in PFCR5. Do not set up for TPU
or when the setting for either TCR_4 or TCR_5 is TPSC2 to TPSC0 = B'101. TCLKC
input when phase counting mode is set for channels 2 and 4.
output or DMAC with SSI0-A input.
output or DMAC with SSI0-A output.
TIOCB1
output
below
(1) in
table
⎯
⎯
input
P15
⎯
0
(2) in table below
⎯
0
0
(1) in table below
output
P15
TCLKC input*
1
0
TIOCB1 input*
output
PO13
1
1
2
1
DACK1
output
⎯
⎯
⎯
⎯
0
1
DACK3
output
⎯
⎯
⎯
⎯
1
1
SSI0-A
input*
below
(2) in
table
0
Section 11 I/O Ports
3
Page 569 of 1448
⎯
⎯
⎯
⎯
⎯
output*
SSI0-A
below
(3) in
table
⎯
4