R4F24278NVFQU Renesas Electronics America, R4F24278NVFQU Datasheet - Page 405

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R4F24278NVFQU

Manufacturer Part Number
R4F24278NVFQU
Description
MCU 512K/48K 2.7-5.5V 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Datasheet

Specifications of R4F24278NVFQU

Core Processor
H8S/2600
Core Size
16/32-Bit
Speed
33MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, Smart Card, SPI, SSU, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
98
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Manufacturer
Quantity
Price
Part Number:
R4F24278NVFQU
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Part Number:
R4F24278NVFQU
Manufacturer:
Renesas Electronics America
Quantity:
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H8S/2427, H8S/2427R, H8S/2425 Group
Figure 8.5 illustrates operation in idle mode.
The number of transfers is specified as 16 bits in ETCR. ETCR is decremented by 1 each time a
transfer is executed, and when its value reaches H'0000, the DTE bit in DMABCR in common
register enabled mode or the DTE bit in DMAECRS in common register disabled mode is cleared
and data transfer ends. If the DTIE bit is set to 1 at this time, an interrupt request is sent to the
CPU or DTC. The maximum number of transfers, when H'0000 is set in ETCR, is 65,536.
Transfer requests (activation sources) consist of A/D converter conversion end interrupts, external
requests, SCI transmit data empty and receive data full interrupts, and TPU channel 0 to 5
compare match/input capture A interrupts.
REJ09B0565-0100 Rev. 1.00
Jul 22, 2010
MAR
Figure 8.5 Operation in Idle Mode
Transfer
1 byte or word transfer performed in
response to 1 transfer request
Section 8 DMA Controller (DMAC)
Page 375 of 1448
IOAR

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