R4F24278NVFQU Renesas Electronics America, R4F24278NVFQU Datasheet - Page 254

• Manufacturer Part Number: R4F24278NVFQU
• Description: MCU 512K/48K 2.7-5.5V 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24278NVFQU

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, Smart Card, SPI, SSU, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 98
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Section 7 Bus Controller (BSC)
(2)
In the data cycle, program wait insertion and pin wait insertion by the WAIT pin are enabled in the
same way as in the basic bus interface. For details, refer to section 7.5.4, Wait Control. Wait
control settings do not affect the address cycles.
7.6.7
In the address/data multiplexed I/O interface, the read strobe timing of data cycles can be modified
in the same way as in the basic bus interface. For details, refer to section 7.5.5, Read Strobe (RD)
Timing. Figure 7.30 shows an example when the read strobe timing is modified.
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RDNn = 0
RDNn = 1
Data Cycle
Read Strobe (RD) Timing
Note: n = 6, 7
AD15 to AD8
AD15 to AD8
Address bus
Figure 7.30 Example of Read Strobe Timing
CSn
RD
RD
AH
φ
Tma1
Address cycle
Address
Address
Tma2
T1
H8S/2427, H8S/2427R, H8S/2425 Group
Data cycle
REJ09B0565-0100 Rev. 1.00
Read
data
T2
Read
data
Jul 22, 2010