R4F24278NVFQU Renesas Electronics America, R4F24278NVFQU Datasheet - Page 931

• Manufacturer Part Number: R4F24278NVFQU
• Description: MCU 512K/48K 2.7-5.5V 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24278NVFQU

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, Smart Card, SPI, SSU, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 98
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

H8S/2427, H8S/2427R, H8S/2425 Group
This LSI has five independent serial communication interface (SCI) channels. The SCI can handle
both asynchronous and clocked synchronous serial communication. Serial data communication
can be carried out with standard asynchronous communication chips such as a Universal
Asynchronous Receiver/Transmitter (UART) or Asynchronous Communication Interface Adapter
(ACIA). A function is also provided for serial communication between processors (multiprocessor
communication function) in asynchronous mode. The SCI also supports an IC card (Smart Card)
interface conforming to ISO/IEC 7816-3 (Identification Card) as an asynchronous serial
communication interface extension function. One of the five SCI channels (SCI_0) can generate
an IrDA communication waveform conforming to IrDA specification version 1.0. This LSI
incorporates the on-chip CRC (Cyclic Redundancy Check) computing unit that realizes high
reliability of high-speed data transfer as SCI extended function. Since the CRC computing unit is
not connected to SCI, operation is executed by writing data to registers.
Figure 16.1 shows a block diagram of the SCI.
16.1
• Choice of asynchronous or clocked synchronous serial communication mode
• Full-duplex communication capability
• On-chip baud rate generator allows any bit rate to be selected
• Choice of LSB-first or MSB-first transfer (except in the case of asynchronous mode 7-bit data)
• Four interrupt sources
• Module stop state can be set.
REJ09B0565-0100 Rev. 1.00
Jul 22, 2010
The transmitter and receiver are mutually independent, enabling transmission and reception to
be executed simultaneously. Double-buffering is used in both the transmitter and the receiver,
enabling continuous transmission and continuous reception of serial data.
External clock can be selected as a transfer clock source (except for in Smart Card interface
mode).
Four interrupt sources ⎯ transmit-end, transmit-data-empty, receive-data-full, and receive
error ⎯ that can issue requests. The transmit-data-empty interrupt and receive data full
interrupts can activate the data transfer controller (DTC) or DMA controller (DMAC).
Features
Section 16 Serial Communication Interface
(SCI, IrDA, CRC)
Section 16 Serial Communication Interface (SCI, IrDA, CRC)
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