R4F24278NVFQU Renesas Electronics America, R4F24278NVFQU Datasheet - Page 753

• Manufacturer Part Number: R4F24278NVFQU
• Description: MCU 512K/48K 2.7-5.5V 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24278NVFQU

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, Smart Card, SPI, SSU, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 98
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

H8S/2427, H8S/2427R, H8S/2425 Group
11.17
Note: Port J is not supported in the H8S/2425 Group.
Port J is a 3-bit I/O port. Port J has the following registers.
• Port J data direction register (PJDDR)
• Port J data register (PJDR)
• Port J register (PORTJ)
• Port J open drain control register (PJODR)
11.17.1 Port J Data Direction Register (PJDDR)
The individual bits of PJDDR specify input or output for the pins of port J. PJDDR cannot be read;
if it is, an undefined value will be read.
11.17.2 Port J Data Register (PJDR)
PJDR stores output data for the port J pins.
REJ09B0565-0100 Rev. 1.00
Jul 22, 2010
Bit
7 to 2
1
0
Bit
7 to 2
1
0
Bit Name
⎯
PJ1DR
PJ0DR
Bit Name
⎯
PJ1DDR
PJ0DDR
Port J
Initial Value
All 0
0
0
Initial Value
All 0
0
0
R/W
⎯
W
W
R/W
⎯
R/W
R/W
Description
Reserved
When a pin function is specified as a general
purpose I/O, setting this bit to 1 makes the
corresponding pin an output port, while clearing this
bit to 0 makes the corresponding pin an input port.
Description
Reserved
These bits are always read as 0 and cannot be
modified.
Output data for a pin is stored when the pin function
is specified as a general purpose I/O.
Section 11 I/O Ports
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