R4F24278NVFQU Renesas Electronics America, R4F24278NVFQU Datasheet - Page 530

• Manufacturer Part Number: R4F24278NVFQU
• Description: MCU 512K/48K 2.7-5.5V 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24278NVFQU

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, Smart Card, SPI, SSU, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 98
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Section 10 Data Transfer Controller (DTC)
The DTC's register information is stored in the on-chip RAM. When the DTC is used, the RAME
bit in SYSCR must be set to 1 and the MSTP33 and MSTP32 bits in RMMSTPCR must be
cleared to 0. A 32-bit bus connects the DTC to the on-chip RAM (1 Kbyte), enabling 32-bit/1-
state reading and writing of the DTC register information.
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CPU interrupt request
DTC activation request
Interrupt source clear
[Legend]
MRA and MRB:
SAR:
DAR:
CRA and CRB:
DTCERA to DTCERI:
DTCCR:
DTCVBR:
Interrupt controller
vector number
DTCERA
DTCERI
DTCCR
request
to
External device
(memory
External
memory
mapped)
8
On-chip ROM
On-chip RAM
peripheral
DTC mode registers A and B
DTC source address register
DTC destination address register
DTC transfer count registers A and B
DTC enable registers A to I
DTC control register
DTC vector base register
modules
On-chip
Figure 10.1 Block Diagram of DTC
Bus controller
DTCVBR
REQ
ACK
DTC
Activation
Register
Interrupt
control
control
control
H8S/2427, H8S/2427R, H8S/2425 Group
Bus interface
REJ09B0565-0100 Rev. 1.00
MRA
MRB
SAR
DAR
CRA
CRB
Jul 22, 2010