R4F24278NVFQU Renesas Electronics America, R4F24278NVFQU Datasheet - Page 63

• Manufacturer Part Number: R4F24278NVFQU
• Description: MCU 512K/48K 2.7-5.5V 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24278NVFQU

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, Smart Card, SPI, SSU, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 98
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

H8S/2427, H8S/2427R, H8S/2425 Group
REJ09B0565-0100 Rev. 1.00
Jul 22, 2010
Type
Operating
mode
control
System
control
Address
bus
Data bus
Address/
data
multiplexed
bus
Symbol
MD2
MD1
MD0
RES
STBY
EMLE
A23 to A0
D15 to D0
AD15 to
AD0
31 to 26,
H8S/2427, H8S/2427R
PLQP0144KA-A
1
144
143
92
103
32
24 to 19,
17 to 11,
9 to 5
80 to 73,
71,
69 to 63
80 to 73,
71,
69 to 63
PTLG0145JB-A
(in Planning)
B1
A2
A3
G11
D13
K1
J3, K2, J1, K4
H3, J2, J4, G3
H2, G1, H4, G4
F1, G2, F3, E4
E1, F2, E3, D1
D3, D2, C3, C1
K11, K12, L13
L11, M12, L12
N13, M13, N11
M11, N10, L9
M10, N9, K10
L8
K11, K12, L13,
L11, M12, L12,
N13, M13, N11,
M10, N10, K10,
L10, M9, N9, K9
Pin No.
H8S/2425
PLQ0120LA-A
PLQP0120KA-A I/O
1
120
119
77
88
30
29 to 23,
21 to 18,
16 to 9,
7 to 3
68 to 61,
59,
57 to 51
68 to 61,
59,
57 to 51
Input
Input
Input
Input
Output These pins output an address.
Input/
output
Input/
output
Function
These pins set the operating mode.
These pins should not be changed
during operation.
Reset pin. When this pin is driven
low, the chip is reset.
When this pin is driven low, a
transition is made to hardware
standby mode.
On-chip emulator enable pin. When
the on-chip emulator is used, this
pin should be fixed high. At this
time, pins P53, PG4 to PG6, and
WDTOVF are used exclusively by
the on-chip emulator. Therefore, the
corresponding pin functions of those
pins are not available. When the on-
chip emulator is not used, this pin
should be fixed low.
These pins constitute a bidirectional
data bus. When an address/data
multiplexed I/O space is accessed,
an address is also output.
These pins output an address, and
input or output data.
Section 1 Overview
Page 33 of 1448