R4F24278NVFQU Renesas Electronics America, R4F24278NVFQU Datasheet - Page 533

• Manufacturer Part Number: R4F24278NVFQU
• Description: MCU 512K/48K 2.7-5.5V 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24278NVFQU

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, Smart Card, SPI, SSU, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 98
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

H8S/2427, H8S/2427R, H8S/2425 Group
10.2.2
MRB selects the DTC operating mode.
10.2.3
SAR is a 24-bit register that designates the source address of data to be transferred by the DTC.
For word-size transfer, specify an even source address.
REJ09B0565-0100 Rev. 1.00
Jul 22, 2010
Bit
7
6
5
4 to 0
Bit Name
CHNE
DISEL
CHNS
⎯
DTC Mode Register B (MRB)
DTC Source Address Register (SAR)
Initial Value
Undefined
Undefined
Undefined
Undefined
R/W
⎯
⎯
⎯
⎯
Description
DTC Chain Transfer Enable
When this bit is set to 1, a chain transfer will be
performed. For details, refer to section 10.5.6,
Chain Transfer.
In data transfer with CHNE set to 1, determination
of the end of the specified number of transfers,
clearing of the activation source flag, and clearing
of DTCER is not performed.
DTC Interrupt Select
When this bit is set to 1, a CPU interrupt request is
generated every time after a data transfer ends.
When this bit is set to 0, a CPU interrupt request is
generated at the time when the specified number
of data transfer ends.
DTC Chain Transfer Select
Specifies the chain transfer condition.
0: Chain transfer every time
1: Chain transfer only when transfer counter = 0
Reserved
These bits have no effect on DTC operation, and
should always be written with 0.
Section 10 Data Transfer Controller (DTC)
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