R4F24278NVFQU Renesas Electronics America, R4F24278NVFQU Datasheet - Page 450

• Manufacturer Part Number: R4F24278NVFQU
• Description: MCU 512K/48K 2.7-5.5V 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24278NVFQU

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, Smart Card, SPI, SSU, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 98
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Section 8 DMA Controller (DMAC)
8.5.15
If the DTE bit in DMABCR in common register enabled mode or the DTE bit in DMAECRS or
DMAECRF in common register disabled mode is cleared to 0 for the channel currently operating,
the DMAC stops on completion of the 1-byte or 1-word transfer in progress. DMAC operation
resumes when the DTE bit is set to 1 again. In full address mode, the same applies to the DTME
bit in DMABCR in common register enabled mode or the DTME bit in DMAECRF in common
register disabled mode. Figure 8.41 shows the procedure for forcibly terminating DMAC
operation by software.
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Figure 8.41 Example of Procedure for Forcibly Terminating DMAC Operation
Forcible Termination of DMAC Operation
Forced termination
Forced termination
Clear DTE bit to 0
of DMAC
[1]
[1] Clear the DTE bit in DMABCR in common
register enabled mode or the DTE bit in
DMAECRS or DMAECRF in common register
disabled mode to 0.
To prevent interrupt generation after forced
termination of DMAC operation, clear the
DTIE bit to 0 at the same time.
H8S/2427, H8S/2427R, H8S/2425 Group
REJ09B0565-0100 Rev. 1.00
Jul 22, 2010