R4F24278NVFQU Renesas Electronics America, R4F24278NVFQU Datasheet - Page 424

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R4F24278NVFQU

Manufacturer Part Number
R4F24278NVFQU
Description
MCU 512K/48K 2.7-5.5V 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Datasheet

Specifications of R4F24278NVFQU

Core Processor
H8S/2600
Core Size
16/32-Bit
Speed
33MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, Smart Card, SPI, SSU, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
98
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Section 8 DMA Controller (DMAC)
ETCRB is decremented by 1 after every block transfer, and when the count reaches H'0000 the
DTE bit in DMABCR in common register enabled mode or the DTE bit in DMAECRF in
common register disabled mode is cleared and transfer ends. If the DTIE bit in DMABCR in
common register enabled mode or the DTIE bit in DMAECRF in common register disabled mode
is set to 1 at this point, an interrupt request is sent to the CPU or DTC.
Figure 8.19 shows the operation flow in block transfer mode.
Page 394 of 1448
Figure 8.19 Operation Flow in Block Transfer Mode
DAR = DAR – DAIDE · (–1)
SAR = SAR – SAIDE · (–1)
DAR = DAR + DAIDE · (–1)
SAR = SAR + SAIDE · (–1)
No
Write to address specified by DAR
Read address specified by SAR
ETCRAL = ETCRAL – 1
ETCRB = ETCRB – 1
ETCRAL = ETCRAH
Clear DTE bit to 0
(DTE = DTME = 1)
ETCRAL = H'00
ETCRB = H'0000
Transfer request
to end transfer
Release bus
BLKDIR = 0
Acquire bus
Start
Yes
Yes
Yes
Yes
DAID
SAID
· 2
· 2
SAID
DAID
DTSZ
DTSZ
· 2
· 2
DTSZ
· ETCRAH
DTSZ
· ETCRAH
No
No
No
H8S/2427, H8S/2427R, H8S/2425 Group
REJ09B0565-0100 Rev. 1.00
Jul 22, 2010

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