R4F24278NVFQU Renesas Electronics America, R4F24278NVFQU Datasheet - Page 1180

• Manufacturer Part Number: R4F24278NVFQU
• Description: MCU 512K/48K 2.7-5.5V 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24278NVFQU

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, Smart Card, SPI, SSU, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 98
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

H8S/2427, H8S/2427R, H8S/2425 Group
Section 23 Flash Memory
23.6.4
Program
This command writes data to the flash memory in 2-word units.
Write H'41xx in the first bus cycle and write data to the target address in the second and third bus
cycles; the flash memory starts automatic writing (programming and verifying data). The address
value specified in the first bus cycle should be the same even address as that specified in the
second bus cycle.
Completion of automatic writing can be checked through the FMRDY bit in FLMSTR. The
FMRDY bit is 0 (busy) during automatic writing and becomes 1 (ready) when writing is
completed.
After automatic writing is completed, the result can be checked through the FMPRSF bit in
FMRSTR (refer to section 23.9, Full Status Check).
Once an address is programmed, additional data should not be written to the address. Figure 23.4
shows a flowchart of the program command processing.
In the EW0 mode, the read status register mode is entered as soon as automatic writing starts, and
the status register can be read. The SR7 bit in the status register becomes 0 when automatic
writing starts and returns to 1 when writing is completed. In this case, the flash memory stays in
the read status register mode until a read array command is issued. After automatic writing is
completed, the result of writing can be checked by reading the status register.
Page 1150 of 1448
REJ09B0565-0100 Rev. 1.00
Jul 22, 2010