R4F24278NVFQU Renesas Electronics America, R4F24278NVFQU Datasheet - Page 365

• Manufacturer Part Number: R4F24278NVFQU
• Description: MCU 512K/48K 2.7-5.5V 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24278NVFQU

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, Smart Card, SPI, SSU, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 98
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

H8S/2427, H8S/2427R, H8S/2425 Group
REJ09B0565-0100 Rev. 1.00
Jul 22, 2010
Bit
4
3
2
1
0
Bit Name
DTDIR
DTF3
DTF2
DTF1
DTF0
Initial Value
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
Description
Data Transfer Direction
Used in combination with the SAE bit in DMABCR
in common register enabled mode or in
DMAECRS in common register disabled mode to
specify the data transfer direction (source or
destination). The function of this bit is different in
dual address mode and single address mode.
•
•
Data Transfer Factor 3 to 0
These bits select the activation source for data
transfer.
0000: Setting prohibited
0001: Activated by A/D converter unit 0
0010: Activated by DREQ pin falling edge input*
0011: Activated by DREQ pin low-level input*
0100: Activated by SCI channel 0 transmit data
0101: Activated by SCI channel 0 receive data full
0110: Activated by SCI channel 1 transmit data
0111: Activated by SCI channel 1 receive data full
When SAE = 0
0: Transfer with MAR as source address and
1: Transfer with IOAR as source address and
When SAE = 1
0: Transfer with MAR as source address and
1: Transfer with DACK pin as read strobe and
conversion end interrupt
(detected as a low level in the first transfer
after transfer is enabled)
empty interrupt
interrupt
empty interrupt
interrupt
IOAR as destination address
MAR as destination address
DACK pin as write strobe
MAR as destination address
Section 8 DMA Controller (DMAC)
Page 335 of 1448