R4F24278NVFQU Renesas Electronics America, R4F24278NVFQU Datasheet - Page 829

• Manufacturer Part Number: R4F24278NVFQU
• Description: MCU 512K/48K 2.7-5.5V 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24278NVFQU

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, Smart Card, SPI, SSU, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 98
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

H8S/2427, H8S/2427R, H8S/2425 Group
12.4.4
In cascaded operation, two 16-bit counters for different channels are used together as a 32-bit
counter.
This function works by counting the channel 1 (channel 4, channel 7, or channel 10) counter clock
at overflow/underflow of TCNT_2 (TCNT_5, TCNT_8, or TCNT_11) as set in bits TPSC2 to
TPSC0 in TCR.
Underflow occurs only when the lower 16-bit TCNT is in phase-counting mode.
Table 12.30 shows the register combinations used in cascaded operation.
Note: When phase counting mode is set for channel 1, 4, 7, or 10, the counter clock setting is
Table 12.30 Cascaded Combinations
(1)
Figure 12.18 shows an example of the setting procedure for cascaded operation.
REJ09B0565-0100 Rev. 1.00
Jul 22, 2010
Combination
Channels 1 and 2
Channels 4 and 5
Channels 7 and 8
Channels 10 and 11
Example of Cascaded Operation Setting Procedure
invalid and the counter operates independently in phase counting mode.
Cascaded Operation
<Cascaded operation>
Cascaded operation
Figure 12.18 Cascaded Operation Setting Procedure
Set cascading
Start count
Upper 16 Bits
TCNT_1
TCNT_4
TCNT_7
TCNT_10
[1]
[2]
[1]
[2]
Set bits TPSC2 to TPSC0 in the channel 1
(channel 4) TCR to B'1111 to select TCNT_2
(TCNT_5) overflow/underflow counting.
Set the CST bit in TSTR for the upper and lower
channel to 1 to start the count operation.
Lower 16 Bits
TCNT_2
TCNT_5
TCNT_8
TCNT_11
Section 12 16-Bit Timer Pulse Unit (TPU)
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