TMPR4937XBG-300 Toshiba, TMPR4937XBG-300 Datasheet - Page 537

• Manufacturer Part Number: TMPR4937XBG-300
• Manufacturer: Toshiba

Specifications of TMPR4937XBG-300

• Family Name: TX49
• Device Core Size: 64b
• Frequency (max): 300MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.5V
• Operating Supply Voltage (max): 1.6V
• Operating Supply Voltage (min): 1.4V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 484
• Package Type: BGA
• Lead Free Status / Rohs Status: Compliant

On-chip PCI Controller
(Priority: High)
(Priority: Low)
High Level
Low Level
<Conditions>
[Workarounds]
(1) The broken master detection function is enabled (BMCEN=1).
(2) The bus masters are assigned to the high level and low level in the on-chip PCI bus arbiter.
(3) When the PCI bus master connected to the high level is detected as the broken master, the master
(1) Don’t use the broken master function.
(2) When using the broken master function, use only the high level containing Master A, B, C and D.
This problem occurs when the following conditions are satisfied.
There are two workarounds for this problem.
The broken master detection function is enabled or disabled with the BMCEN bit of the PCI bus
arbiter configuration register (PBACFG). The default value is 0 which disables the function.
The bus master is assigned to the bus arbiter with the PCI Bus Arbiter Request Port Register
(PBAREQPORT).
connected to the low level requests the bus mastership, which is the highest-priority request in the
low level. (That is Master W immediately after a reset or the master which acquires the bus
mastership most recently in the low level when the fixed park master mode is not set, or Master W
that is the park master in the fixed park master mode.)
Don’t set the BMCEN bit of the PBACFG register.
Master Z
Master A
Master B
PCI Arbitration Priority
Master W
Low-level
Master Y
Master
23-7
Chapter 23 Notes on Use of TMPR4937
Master C
Master D
(Park master)
Master X
Request
Request
Grant
PCI Bus Master 2
PCI bus master 2
Access is not started
also becomes a
PCI Bus Master 1
broken master.
Broken Master
within 16PCICLK