TMPR4937XBG-300 Toshiba, TMPR4937XBG-300 Datasheet - Page 282

• Manufacturer Part Number: TMPR4937XBG-300
• Manufacturer: Toshiba

Specifications of TMPR4937XBG-300

• Family Name: TX49
• Device Core Size: 64b
• Frequency (max): 300MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.5V
• Operating Supply Voltage (max): 1.6V
• Operating Supply Voltage (min): 1.4V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 484
• Package Type: BGA
• Lead Free Status / Rohs Status: Compliant

10.4.1
10.4.2
10.4.3
10.4.4
10.4.5
10.4.6
10.4.7
10.4.8
10.4.9
10.4.10
10.4.11
10.4.12
10.4.13
10.4.14
10.4.15
10.4.16
10.4.17
10.4.18
10.4.19
10.4.20
10.4.21
10.4.22
10.4.23
10.4.24
10.4.25
10.4.26
10.4.27
10.4.28
10.4.29
10.4.30
10.4.31
10.4.32
10.4.33
10.4.34
10.4.35
10.4.36
10.4.37
10.4.38
10.4.39
10.4.40
10.4 PCI Controller Control Register
Section
names indicate the corresponding PCI Configuration Space Register.
0xD000
0xD004
0xD008
0xD00C
0xD010
0xD014
0xD018
0xD01C
0xD020
0xD024
0xD02C
0xD034
0xD03C
0xD040
0xD080
0xD084
0xD088
0xD08C
0xD090
0xD094
0xD098
0xD09C
0xD100
0xD104
0xD108
0xD10C
0xD110
0xD114
0xD118
0xD11C
0xD120
0xD128
0xD130
0xD138
0xD140
0xD144
0xD148
0xD14C
0xD150
0xD158
Table 10.4.1 lists the registers contained in the PCI Controller Control Register. Parentheses in the register
Address
Size
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
64
64
64
64
32
32
32
32
64
64
Table 10.4.1 PCI Controller Control Register (1/2)
PCIID
PCISTATUS
PCICCREV
PCICFG1
P2GM0PLBASE
P2GM0PUBASE
P2GM1PLBASE
P2GM1PUBASE
P2GM2PBASE
P2GIOPBASE
PCISID
PCICAPPTR
PCICFG2
G2PTOCNT
G2PSTATUS
G2PMASK
PCISSTATUS
PCIMASK
P2GCFG
P2GSTATUS
P2GMASK
P2GCCMD
PBAREQPORT
PBACFG
PBASTATUS
PBAMASK
PBABM
PBACREQ
PBACGNT
PBACSTATE
G2PM0GBASE
G2PM1GBASE
G2PM2GBASE
G2PIOGBASE
G2PM0MASK
G2PM1MASK
G2PM2MASK
G2PIOMASK
G2PM0PBASE
G2PM1PBASE
Mnemonic
ID Register (Device ID, Vendor ID)
PCI Status, Command Register (Status, Command)
Class Code, Revision ID Register (Class Code, Revision ID)
PCI Configuration 1 Register
(BIST, Header Type, Latency Timer, Cache Line Size)
P2G Memory Space 0 PCI Lower Base Address Register
(Base Address 0 Lower)
P2G Memory Space 0 PCI Upper Base Address Register
(Base Address 0 Upper)
P2G Memory Space 1 PCI Lower Base Address Register
(Base Address 1 Lower)
P2G Memory Space 1 PCI Upper Base Address Register
(Base Address 1 Upper)
P2G Memory Space 2 PCI Base Address Register (Base Address 2)
P2G I/O Space PCI Base Address Register (Base Address 3)
Subsystem ID Register (Subsystem ID, Subsystem Vendor ID)
Capabilities Pointer Register (Capabilities Pointer)
PCI Configuration 2 Register
(Max_Lat, Min_Gnt, Interrupt Pin, Interrupt Line)
G2P Timeout Count Register
(Retry Timeout Value, TRDY Timeout Value)
G2P Status Register
G2P Interrupt Mask Register
Satellite Mode PCI Status Register (Status, PMCSR)
PCI Status Interrupt Mask Register
P2G Configuration Register
P2G Status Register
P2G Interrupt Mask Register
P2G Current Command Register
PCI Bus Arbiter Request Port Register
PCI Bus Arbiter Configuration Register
PCI Bus Arbiter Status Register
PCI Bus Arbiter Interrupt Mask Register
PCI Bus Arbiter Broken Master Register
PCI Bus Arbiter Current Request Register (for diagnositics)
PCI Bus Arbiter Current Grant Register (for diagnostics)
PCI Bus Arbiter Currrent State Register (for diagnostics)
G2P Memory Space 0 G-Bus Base Address Register
G2P Memory Space 1 G-Bus Base Address Register
G2P Memory Space 2 G-Bus Base Address Register
G2P I/O Space G-Bus Base Address Register
G2P Memory Space 0 Address Mask Register
G2P Memory Space 1 Address Mask Register
G2P Memory Space 2 Address Mask Register
G2P I/O Space Address Mask Register
G2P Memory Space 0 PCI Base Address Register
G2P Memory Space 1 PCI Base Address Register
10-24
Chapter 10 PCI Controller
Register Name