TMPR4937XBG-300 Toshiba, TMPR4937XBG-300 Datasheet - Page 304

• Manufacturer Part Number: TMPR4937XBG-300
• Manufacturer: Toshiba

Specifications of TMPR4937XBG-300

• Family Name: TX49
• Device Core Size: 64b
• Frequency (max): 300MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.5V
• Operating Supply Voltage (max): 1.6V
• Operating Supply Voltage (min): 1.4V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 484
• Package Type: BGA
• Lead Free Status / Rohs Status: Compliant

31:25
16:0
Bit
24
23
22
21
20
19
18
17
31
15
10.4.20 P2G Status Register (P2GSTATUS)
Mnemonic
PMECLR
PMEES
M66EN
TOBFE
IOBFE
PMSC
TIBFE
IIBFE
Reserved
Reserved
PM State Change
Detected
PME_En Set
Detected
PME Status Clear
Detected
66 MHz Drive
Status
Initiator Out-
Bound FIFO
Empty
Initiator In-Bound
FIFO Empty
Target Out-Bound
FIFO Empty
Target In-Bound
FIFO Empty
Reserved
Field Name
Power Management State Change (Default: 0x0)
“1” is set to this bit when the PowerState field of the Power Management
Register (PMCSR) is rewritten.
This bit is cleared to “0” when a “1” is written to it. This bit is only valid when
the PCI Controller is in the Satellite mode.
PME_En Set (Default: 0x0)
This bit is set to “1” when the PME_En bit of the PMCSR Register is set to
“1”. When this bit is set, it indicates that the PCI Master (Host) device
enabled PME* signal output.
1: Indicates that the PME_En bit is set.
0: Indicates that the PME_En bit is not set.
This bit is cleared to “0” when a “1” is written to it. This bit is only valid when
the PCI Controller is in the Satellite mode.
PME_Status Clear (Default: 0x0)
This bit indicates that the PME_Status bit of the PMCSR Register was
cleared.
1: Indicates that the PME_Status bit was cleared.
0: Indicates that the PME_Status bit was not cleared.
This bit is cleared to “0” when a “1” is written to it. This bit is only valid when
the PCI Controller is in the Satellite mode.
M66EN Status (Default: 0x0)
This bit indicates the current status of the M66EN signal. This bit can only
be read. Writes to this bit are invalid.
1: The M66EN signal is asserted.
0: The M66EN signal is deasserted.
Initiator Out-Bound FIFO Empty (Default: 0x1)
1: Indicates that the Initiator Out-Bound FIFO is empty.
0: Indicates that the Initiator Out-Bound FIFO is not empty.
This is a diagnostic function.
Initiator In-Bound FIFO Empty (Default: 0x1)
1: Indicates that the Initiator In-Bound FIFO is empty.
0: Indicates that the Initiator In-Bound FIFO is not empty.
This is a diagnostic function.
Target Out-Bound FIFO Empty (Default: 0x1)
1: Indicates that the Target Out-Bound FIFO is empty.
0: Indicates that the Target Out-Bound FIFO is not empty.
This is a diagnostic function.
Target In-Bound FIFO Empty (Default: 0x1)
1: Indicates that the Target In-Bound FIFO is empty.
0: Indicates that the Target In-Bound FIFO is not empty.
This is a diagnostic function.
Figure 10.4.18 P2G Status Reigster
25
R/W1C R/W1C R/W1C
PMSC
0x0
24
Reserved
10-46
PMEES
0x0
23
PMECLR
0x0
22
Description
0xD094
M66EN IOBFE IIBFE TOBFE TIBFE
0x0
21
R
Chapter 10 PCI Controller
0x1
20
R
0x1
19
R
0x1
18
R
0x1
17
R
Reserved
Read/Write
R/W1C
R/W1C
R/W1C
R
R
R
R
R
16
0
⎯
⎯
: Type
: Initial value
: Type
: Initial value