TMPR4937XBG-300 Toshiba, TMPR4937XBG-300 Datasheet - Page 112

• Manufacturer Part Number: TMPR4937XBG-300
• Manufacturer: Toshiba

Specifications of TMPR4937XBG-300

• Family Name: TX49
• Device Core Size: 64b
• Frequency (max): 300MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.5V
• Operating Supply Voltage (max): 1.6V
• Operating Supply Voltage (min): 1.4V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 484
• Package Type: BGA
• Lead Free Status / Rohs Status: Compliant

ACK*/READY (Output)
ADDR [19:0]
7.3.6.4
DATA [31:0]
SYSCLK
OE*
CE*
Page Mode
mode. When it is in the ACK*/Ready Static mode, the ACK*/Ready signal becomes HiZ.
EBCCRn.WT. The Single access protocol in Page mode is identical to that of Normal mode,
except the number of wait cycles inserted. The Wait cycle count in the first access cycle of Single
access or Burst access is determined by the EBCCRn.WT value. The Wait cycle count can be set
from 0 to 15. The Wait cycle count of subsequent Burst cycles is determined by the
EBCCRn.PWT value. The Wait cycle count can be set from 0 to 3.
When in this mode, the ACK*/Ready pin becomes ACK* output when it is in the Dynamic
Wait cycles are inserted into the access cycle according to the values of EBCCRn.PWT and
EBCCRn.WT=2
Figure 7.3.4 Page Mode (Burst Access)
EBCCRn.PWT=1
7-12
Chapter 7 External Bus Controller
EBCCRn.PWT=1
EBCCRn.PWT=1