TMPR4937XBG-300 Toshiba, TMPR4937XBG-300 Datasheet - Page 296

• Manufacturer Part Number: TMPR4937XBG-300
• Manufacturer: Toshiba

Specifications of TMPR4937XBG-300

• Family Name: TX49
• Device Core Size: 64b
• Frequency (max): 300MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.5V
• Operating Supply Voltage (max): 1.6V
• Operating Supply Voltage (min): 1.4V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 484
• Package Type: BGA
• Lead Free Status / Rohs Status: Compliant

31:24
23:16
Bits
15:8
7:0
31
15
10.4.13 PCI Configuration 2 Register (PCICFG2)
Mnemonic
MG
ML
IP
IL
The following fields correspond to the following registers:
This register cannot be accessed when the PCI Controller is in the Satellite mode.
Max. Latency field → Max_Lat Register of the PCI Configuration Space
Min. Grant field → Min_Gnt Register of the PCI Configuration Space
Interrupt Pin field → Interrupt Pin Register of the PCI Configuration Space
Interrupt Line field → Interrupt Line Register of the PCI Configuration Space
Maximum
Latency
Minimum Grant
Interrupt Pin
Interrupt Line
Field Name
0x0A
0x01
R/L
R/L
ML
IP
Figure 10.4.11 PCI Configuration 2 Register
Max_Lat (Maximum Latency) (Default: 0x0A)
00h: Does not use this register to determine PCI Bus priority.
01h-FFh: Specifies the time interval for requesting bus ownership.
It is possible to change the maximum latency by loading data from
Configuration EEPROM during initialization.
Min_Gnt (Minimum Grant) (Default: 0x02)
00h: Is not used to calculate the latency timer value.
01h-FFh: Sets the time required for Burst transfer.
It is possible to change this value by loading data from Configuration
EEPROM during initialization.
Interrupt Pin (Default: 0x01)
Valid values: 00 - 04h
00h: Do not use interrupt signals.
01h: Use Interrupt signal INTA*
02h: Use Interrupt signal INTB*
03h: Use Interrupt signal INTC*
04h: Use Interrupt signal INTD*
05h - FFh: Reserved
It is possible to change this value by loading data from Configuration
EEPROM during initialization.
When using either the REQ[2]* signal or the PIO signal to report an
interrupt to an external device as the PCI device, please use EEPROM to
set the connection with that device.
Interrupt Line (Default: 0x00)
This is a readable/writable 8-bit register. The software uses this register to
indicate information such as the interrupt signal connection information.
Operation of the TX4937 is not affected.
In units of 250 ns, assuming the PCICLK is 33 MHz.
In units of 250 ns, assuming the PCICLK is 33 MHz.
24
8
10-38
23
7
Description
0xD03C
Chapter 10 PCI Controller
0x02
0x00
R/W
MG
R/L
IL
Read/Write
R/L
R/L
R/L
R/W
16
0
: Type
: Initial value
: Type
: Initial value