TMPR4937XBG-300 Toshiba, TMPR4937XBG-300 Datasheet - Page 536

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TMPR4937XBG-300

Manufacturer Part Number
TMPR4937XBG-300
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMPR4937XBG-300

Family Name
TX49
Device Core Size
64b
Frequency (max)
300MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.5V
Operating Supply Voltage (max)
1.6V
Operating Supply Voltage (min)
1.4V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
484
Package Type
BGA
Lead Free Status / Rohs Status
Compliant

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Quantity
Price
Part Number:
TMPR4937XBG-300
Manufacturer:
TOSHIBA
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16 845
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Manufacturer:
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23.4 Note on PCI Controller
[Restrictions]
[Overview]
Set four target spaces, that are MEM0, MEM1, MEM2 and IO contained in PCI controller, so that
address windows are not duplicated. See 10.3.5 Target Access.
We recommend to set 0 to G2PTOCNT. See 10.4.14 G2P Timeout Count Register.
When TX4937 is the PCI target, access in dual address cycle is disabled. See 10.3.3 Supported PCI Bus
Commands.
Notes on Register Read by PCI Controller
When writing to PCI bus by PDMAC of PCIC, don’t read on-chip SRAM or register in the controller
connected to G-Bus.
Restrictions on use of the broken master function in the PCI controller
(1) Normal method
(2) Method to read at any timing
be incorrectly acknowledged to be broken.
be incorrectly acknowledged as the broken master.
does not start access though it has the bus, as the broken master and removes that PCI master from the
bus arbitration sequence.
broken master and acknowledge it as a broken master.
Read the Power Status (PS) field in the PCISTATUS register (10.4.17) by the following procedures.
When the broken master function in the PCI controller is used, the master which is not broken may
or
When the broken master function in the PCI controller is used, the master which is not broken may
The broken master detection function of the on-chip PCI bus arbiter detects the PCI master, which
When the broken master detection function detects the broken master, it may also detect the non-
Don’t use the broken master function
To use the broken master function, use only the high level containing Master A, B, C or D.
After checking that P2GSTATUS.PMCS bit is set, read the PCISTATUS.PS field.
To read the PCISTATUS.PS field directly without using the method (1), read the field twice
consecutively. The same value which is read twice consecutively is applied.
23-6
Chapter 23 Notes on Use of TMPR4937

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