TMPR4937XBG-300 Toshiba, TMPR4937XBG-300 Datasheet - Page 307

• Manufacturer Part Number: TMPR4937XBG-300
• Manufacturer: Toshiba

Specifications of TMPR4937XBG-300

• Family Name: TX49
• Device Core Size: 64b
• Frequency (max): 300MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.5V
• Operating Supply Voltage (max): 1.6V
• Operating Supply Voltage (min): 1.4V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 484
• Package Type: BGA
• Lead Free Status / Rohs Status: Compliant

Reserved
Reserved
30:28
26:24
22:20
Bit
31
27
23
31
15
10.4.23 PCI Bus Arbiter Request Port Register (PBAREQPORT)
Mnemonic
30
14
ReqAP
ReqBP
ReqCP
ReqWP
ReqAP
R/W
R/W
REQ[3:0]) and each Internal PCI Bus Arbiter Request port (Master A - D, W - Z) (see Figure 10.3.8).
The eight non-reserved fields must be programmed to different values. After changing this register, the
Broken Master Register (BM) value becomes invalid since the bit mapping changes.
111
011
This register sets the correlation between each PCI Bus request source (PCI Controller and
When changing the settings of this register, unused ports must be programmed to a reserved value.
This register is only valid when using the on-chip PCI Bus Arbiter.
Reserved
Request A Port
Reserved
Request B Port
Reserved
Request C Port
Field Name
28
12
Figure 10.4.21 PCI Bus Arbiter Request Port Register (1/2)
Reserved
Reserved
27
11
26
10
Request A Port (Default: 111)
Sets the PCI Bus Master that connects to the Internal PCI Bus Arbiter
Request A Port (Master A).
111: Makes the PCI Controller Master A.
110: Reserved
101: Reserved
100: Reserved
011: Makes REQ*[3] Master A.
010: Makes REQ*[2] Master A.
001: Makes REQ*[1] Master A.
000: Makes REQ*[0] Master A.
Request B Port (Default: 110)
Sets the PCI Bus Master that connects to the Internal PCI Bus Arbiter
Request B Port (Master B).
111: Makes the PCI Controller Master B.
110: Reserved
101: Reserved
100: Reserved
011: Makes REQ*[3] Master B.
010: Makes REQ*[2] Master B.
001: Makes REQ*[1] Master B.
000: Makes REQ*[0] Master B.
Request C Port (Default: 101)
Sets the PCI Bus Master that connects to the Internal PCI Bus Arbiter
Request C Port (Master C).
111: Makes the PCI Controller Master C.
110: Reserved
101: Reserved
100: Reserved
011: Makes REQ*[3] Master C.
010: Makes REQ*[2] Master C.
001: Makes REQ*[1] Master C.
000: Makes REQ*[0] Master C.
ReqBP
ReqXP
R/W
R/W
110
010
24
8
10-49
Reserved
Reserved
23
7
22
6
Description
ReqCP
ReqYP
R/W
R/W
101
001
Chapter 10 PCI Controller
20
4
Reserved
Reserved
19
3
0xD100
18
2
ReqDP
ReqZP
R/W
R/W
100
000
Read/Write
R/W
R/W
R/W
16
0
⎯
⎯
⎯
: Type
: Initial value
: Type
: Initial value