TMPR4937XBG-300 Toshiba, TMPR4937XBG-300 Datasheet - Page 110

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TMPR4937XBG-300

Manufacturer Part Number
TMPR4937XBG-300
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMPR4937XBG-300

Family Name
TX49
Device Core Size
64b
Frequency (max)
300MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.5V
Operating Supply Voltage (max)
1.6V
Operating Supply Voltage (min)
1.4V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
484
Package Type
BGA
Lead Free Status / Rohs Status
Compliant

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ACK*/READY (Output)
ACK*/READY(Input)
ADDR [19:0]
ADDR [19:0]
7.3.6.1
7.3.6.2
DATA [31:0]
DATA [31:0]
SYSCLK
SYSCLK
OE*
OE*
CE*
CE*
Normal Mode
ACK*/Ready Dynamic mode. The ACK*/Ready signal becomes High-Z when it is in the
ACK*/Ready Static mode.
cycle. The Wait cycle count is 0 – 0x3e (becomes the external ACK mode when set to
EBCCRn.PWT: WT = 0x3f).
External ACK Mode
ACK* signal from an external device. ACK* input is internally synchronized. Refer to Section
“7.3.7.4 ACK* Input Timing” for more information regarding timing.
When in this mode, the ACK*/Ready signal becomes an ACK* output when it is in the
Wait cycles are inserted according to the EBCCRn.PWT and EBCCRn.WT value at the access
When in this mode, the ACK*/READY pin becomes ACK* input, and the cycle is ended by the
Figure 7.3.2 External ACK Mode
Figure 7.3.1 Normal Mode
EBCCRn.PWT:WT=3
7-10
Chapter 7 External Bus Controller
EBCCRn.SHWT=0
EBCCRn.SHWT=0
expresses indeterminate values
represents indeterminate values.

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