TMPR4937XBG-300 Toshiba, TMPR4937XBG-300 Datasheet - Page 458
![no-image](/images/manufacturer_photos/0/6/668/toshiba_sml.jpg)
TMPR4937XBG-300
Manufacturer Part Number
TMPR4937XBG-300
Description
Manufacturer
Toshiba
Datasheet
1.TMPR4937XBG-300.pdf
(552 pages)
Specifications of TMPR4937XBG-300
Family Name
TX49
Device Core Size
64b
Frequency (max)
300MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.5V
Operating Supply Voltage (max)
1.6V
Operating Supply Voltage (min)
1.4V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
484
Package Type
BGA
Lead Free Status / Rohs Status
Compliant
Available stocks
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Manufacturer
Quantity
Price
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Part Number:
TMPR4937XBG-300
Manufacturer:
TOSHIBA
Quantity:
16 845
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Part Number:
TMPR4937XBG-300
Manufacturer:
DSP
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31:30
29:28
27:26
25:24
23:22
21:20
19:18
Bits
15.4.2
31
15
Mnemonic
IC23
R/W
R/W
IC7
IC23
IC22
IC21
IC19
IC18
IC17
0
0
⎯
30
14
Interrupt Detection Mode Register 0 (IRDM0)
29
13
Interrupt Source
Control 23
Interrupt Source
Control 22
Interrupt Source
Control 21
Interrupt Source
Control 19
Interrupt Source
Control 18
Interrupt Source
Control 17
IC22
R/W
R/W
IC6
Field Name
0
0
28
12
Figure 15.4.2 Interrupt Detection Mode Register 0 (1/2)
⎯
27
11
IC21
R/W
R/W
IC5
0
0
Interrupt Source Control 23 (Default: 00)
These bits specify the active state of PCIPMC interrupts.
00: Low level active
01: Disable
10: Disable
11: Disable
Interrupt Source Control 22 (Default: 00)
These bits specify the active state of PCIERR0 interrupts.
00: Low level active
01: Disable
10: Disable
11: Disable
Interrupt Source Control 21 (Default: 00)
These bits specify the active state of NDFMC interrupts.
00: Low level active
01: Disable
10: Disable
11: Disable
Reserved
Interrupt Source Control 19 (Default: 00)
These bits specify the active state of TMR[2] interrupts.
00: Low level active
01: Disable
10: Disable
11: Disable
Interrupt Source Control 18 (Default: 00)
These bits specify the active state of TMR[1] interrupts.
00: Low level active
01: Disable
10: Disable
11: Disable
Interrupt Source Control 17 (Default: 00)
These bits specify the active state of TMR[0] interrupts.
00: Low level active
01: Disable
10: Disable
11: Disable
10
Reserved
9
R/W
IC4
0
24
8
15-12
23
7
IC19
R/W
R/W
IC3
0
0
Explanation
22
Chapter 15 Interrupt Controller
6
0xF604
21
5
IC18
R/W
R/W
IC2
0
0
20
4
19
3
R/W
R/W
IC17
IC1
0
0
18
2
17
1
IC16
R/W
R/W
IC0
0
0
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
16
0
⎯
: Type
: Default
: Type
: Default
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