TMPR4937XBG-300 Toshiba, TMPR4937XBG-300 Datasheet - Page 114

• Manufacturer Part Number: TMPR4937XBG-300
• Manufacturer: Toshiba

Specifications of TMPR4937XBG-300

• Family Name: TX49
• Device Core Size: 64b
• Frequency (max): 300MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.5V
• Operating Supply Voltage (max): 1.6V
• Operating Supply Voltage (min): 1.4V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 484
• Package Type: BGA
• Lead Free Status / Rohs Status: Compliant

ACK*/READY
SWE*/BWE*
ADDR [19:0]
DATA [31:0]
SYSCLK
CE*/BE*
(Output)
OE*
7.3.7.2
ACK*/READY Input/Output Switching Timing
in the ACK*/Ready Dynamic mode, the ACK*/Ready signal is an input signal when in the
External ACK mode or the Ready mode, but is an output signal in all other modes.
cycle where the CE* signal is asserted. At the end of the access cycle, the ACK* signal is output
(driven) again one clock cycle after the CE* signal is deasserted (see Figure 7.3.3 and Figure
7.5.23).
Figure 7.3.6 SHWT 1 Wait (Normal Mode, Single Read/Write Cycle)
When in the ACK*/Ready Static mode, the ACK*/Ready signal is always an input signal. When
During External ACK mode or Ready mode access, the ACK* signal becomes High-Z at the
7-14
Chapter 7 External Bus Controller
EBCCRn.PWT:WT=0
EBCCRn.SHWT=1