TMPR4937XBG-300 Toshiba, TMPR4937XBG-300 Datasheet - Page 505

• Manufacturer Part Number: TMPR4937XBG-300
• Manufacturer: Toshiba

Specifications of TMPR4937XBG-300

• Family Name: TX49
• Device Core Size: 64b
• Frequency (max): 300MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.5V
• Operating Supply Voltage (max): 1.6V
• Operating Supply Voltage (min): 1.4V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 484
• Package Type: BGA
• Lead Free Status / Rohs Status: Compliant

20.3 Initializing the Extended EJTAG Interface
core is not guaranteed if the Extended EJTAG Interface is not reset. This interface is initialized by either of
the following methods.
•
•
Section 5.1.1.)
The Extended EJTAG Interface is not reset by asserting the RESET* signal. Operation of the TX49/H3
The above methods must be performed while the MASTERCLK signal is being input.
The G-Bus Time Out Detection function is disabled when the TRST* signal is deasserted. (Refer to
Assert the TRST* signal.
(TRST* signal is pulled down (by ex. 10 kΩ))
After clearing the processor reset, set the TMS input to High for five consecutive rising edges of the
TCK input. The reset state is maintained if TMS is able to maintain the High state.
20-7
Chapter 20 Extended EJTAG Interface