TMPR4937XBG-300 Toshiba, TMPR4937XBG-300 Datasheet - Page 154

• Manufacturer Part Number: TMPR4937XBG-300
• Manufacturer: Toshiba

Specifications of TMPR4937XBG-300

• Family Name: TX49
• Device Core Size: 64b
• Frequency (max): 300MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.5V
• Operating Supply Voltage (max): 1.6V
• Operating Supply Voltage (min): 1.4V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 484
• Package Type: BGA
• Lead Free Status / Rohs Status: Compliant

7.6
Flash ROM, SRAM Usage Example
connections. Also, Figure 7.6.3 illustrates example connections with the SDRAM and the bus separated.
load, 100 MHz class high-speed SDRAM access may not be performed normally. As a corrective measure,
there is a way of reducing the bus load by connecting a device other than SDRAM via a buffer. If such a
method is employed, directional control becomes necessary since the data becomes bidirectional.
BUSSPRT* is asserted when the External Bus Controller channel is active and a Read operation is being
performed.
Figure 7.6.1 illustrates example Flash ROM connections, and Figure 7.6.2 illustrates example SRAM
Since connecting multiple memory devices such as SDRAM and ROM onto a single bus increases the
The TX4937 prepares the BUSSPRT* signal for performing data directional control (see Figure 7.6.3).
ADDR[19:0]
TX4937
DATA[31:0]
Figure 7.6.1 Flash ROM (x16 Bits) Connection Example (32-bit Data Bus)
BWE*[3:0]
Figure 7.6.2 SRAM (x16 Bits) Connection Example (32-bit Data Bus)
CE*[1]
SWE*
OE*
ADDR[19:0]
TX4937
DATA[31:0]
CE*[0]
SWE*
ACE*
OE*
ADDR[12]
ADDR[19:0]
ADDR[19:0]
(ADDR[20])
7-54
A[19:0]
CS*
WE*
OE*
UB
BWE*[3]
Chapter 7 External Bus Controller
D[15:0]
A[19:0]
A20
CE*
WE*
OE*
D[15:0]
Flash ROM (x16 bits)
D[31:16]
LB
D[31:16]
BWE*[2]
SRAM (x16 Bits)
A[19:0]
CS*
WE*
OE*
A[19:0]
A20
CE*
WE*
OE*
UB
D[15:0]
BWE*[1]
D[15:0]
D[15:0]
D[15:0]
LB
BWE*[0]