TMPR4937XBG-300 Toshiba, TMPR4937XBG-300 Datasheet - Page 281

• Manufacturer Part Number: TMPR4937XBG-300
• Manufacturer: Toshiba

Specifications of TMPR4937XBG-300

• Family Name: TX49
• Device Core Size: 64b
• Frequency (max): 300MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.5V
• Operating Supply Voltage (max): 1.6V
• Operating Supply Voltage (min): 1.4V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 484
• Package Type: BGA
• Lead Free Status / Rohs Status: Compliant

10.3.14 Set Configuration Space
10.3.15 PCI Clock
10.3.14.1 Set the Configuration Space Using EEPROM
10.3.14.2 Set the Configuration Space Using Software Reset
gray background can be rewritten using one of the two following methods.
PCI clock output mode, the PCI output clock must be connected to the PCICLKIN pin.
In Table 10.5.1, the values for the registers inside the PCI Configuration Space Register that have a
The PCI bus signals are synchronized by the PCI clock applied to the PCICLKIN pin. Therefore, in
Configuration Space from EEPROM address (2n + 2 - 4(n mod 2)). Also, 16-bit data is read in
order from the upper bits to the lower bits. The EEPROM values that correspond to the registers in
Table 10.5.1 that have a white background are “don’t care”.
space without using EEPROM.
(1) Set the value to be loaded in the Configuration Data 0 Register (PCICDATA0), the
(2) Set the Load Configuration Data Register bit (LCFG) of the PCI Controller Configuration
(3) Clear the Software Reset bit (PCICCFG.SRST) at least four PCI Bus clock cycles later. This
(PCICCFG.TCAR) of the PCI Controller Configuration Register to be able to accept access to the
PCI Configuration space.
Load values during Reset by connecting standard 93C46/93C48 EEPROM to a dedicated port.
The PCI Controller reads 16-bit half-word data for address 2n (n: 0, 1, 2, …, 31) of the PCI
By using the following procedure, it is possible to use the software to set the configuration
After these processes are complete, please set the Target Configuration Access Ready bit
Configuration Data 1 Register (PCICDATA1), the Configuration Data 2 Register
(PCICDATA2), and the Configuration Data 3 Register (PCICDATA3).
Register (PCICCFG) and the Software Reset bit (SRST).
starts loading the data.
10-23
Chapter 10 PCI Controller