TMPR4937XBG-300 Toshiba, TMPR4937XBG-300 Datasheet - Page 414

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TMPR4937XBG-300

Manufacturer Part Number
TMPR4937XBG-300
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMPR4937XBG-300

Family Name
TX49
Device Core Size
64b
Frequency (max)
300MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.5V
Operating Supply Voltage (max)
1.6V
Operating Supply Voltage (min)
1.4V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
484
Package Type
BGA
Lead Free Status / Rohs Status
Compliant

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14.3.5
CODEC Register Access
state. This section describes how to read and write CODEC registers via ACLC. For details about
AC’97 register set and proper sequence to operate CODEC, refer to the AC’97 specification and target
CODEC datasheet.
is equipped with a function for reporting CODEC register access completion as status-change or
interrupt.
ACLC CODEC Register Access Register (ACREGACC) with its CODECRD bit set to “1”. After the
ACLC Interrupt Status Register (ACINTSTS)’s REGACC Ready (REGACCRDY) bit is set, the
software is able to get the data returned from the AC’97 by reading the ACREGACC register and issue
another access.
the data in ACLC’s ACREGACC register with ACREGACC.CODECRD bit set to “0”. After the
ACINTSTS.REGACCRDY bit has been set, the software is able to issue another access.
CODEC ID of ‘3’, the software must write ‘3’ into ACREGACC.CODECID field when it issues
secondary CODEC register access.
By accessing registers in the CODEC, the system software is able to detect or control the CODEC
It takes several frame periods for a read or write access to complete. Taking this into account, ACLC
In order to read an AC’97 register, write the access destination CODEC ID and register address in
In order to write to an AC’97 register, write the access destination CODEC ID, register address, and
In case of 5.1 channel audio connection example (Figure 14.3.2), because the secondary CODEC has
14-8
Chapter 14 AC-link Controller

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