TMPR4937XBG-300 Toshiba, TMPR4937XBG-300 Datasheet - Page 461

• Manufacturer Part Number: TMPR4937XBG-300
• Manufacturer: Toshiba

Specifications of TMPR4937XBG-300

• Family Name: TX49
• Device Core Size: 64b
• Frequency (max): 300MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.5V
• Operating Supply Voltage (max): 1.6V
• Operating Supply Voltage (min): 1.4V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 484
• Package Type: BGA
• Lead Free Status / Rohs Status: Compliant

19:18
17:16
15:14
13:12
11:10
Bit
9:8
7:6
5:4
Mnemonic
IC25
IC24
IC15
IC14
IC13
IC12
IC11
IC10
Interrupt Source
Control 25
Interrupt Source
Control 24
Interrupt Source
Control 15
Interrupt Source
Control 14
Interrupt Source
Control 13
Interrupt Source
Control 12
Interrupt Source
Control 11
Interrupt Source
Control 10
Field Name
Figure 15.4.3 Interrupt Detection Mode Register 1 (2/3)
Interrupt Source Control 25 (Default: 00, R/W)
These bits specify the active state of ACLCPME interrupts.
00: Low level active
01: Disable
10: Disable
11: Disable
Interrupt Source Control 24 (Default: 00, R/W)
These bits specify the active state of ACLC interrupts.
00: Low level active
01: Disable
10: Disable
11: Disable
Interrupt Source Control 15 (Default: 00)
These bits specify the active state of PDMAC interrupts.
00: Low level active
01: Disable
10: Disable
11: Disable
Interrupt Source Control 14 (Default: 00)
These bits specify the active state of IRC interrupts.
00: Low level active
01: Disable
10: Disable
11: Disable
Interrupt Source Control 13 (Default: 00)
These bits specify the active state of DMA0 [3] interrupts.
00: Low level active
01: Disable
10: Disable
11: Disable
Interrupt Source Control 12 (Default: 00)
These bits specify the active state of DMA0 [2] interrupts.
00: Low level active
01: Disable
10: Disable
11: Disable
Interrupt Source Control 11 (Default: 00)
These bits specify the active state of DMA0 [1] interrupts.
00: Low level active
01: Disable
10: Disable
11: Disable
Interrupt Source Control 10 (Default: 00)
These bits specify the active state of DMA0 [0] interrupts.
00: Low level active
01: Disable
10: Disable
11: Disable
15-15
Explanation
Chapter 15 Interrupt Controller
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W