TMPR4937XBG-300 Toshiba, TMPR4937XBG-300 Datasheet - Page 5

• Manufacturer Part Number: TMPR4937XBG-300
• Manufacturer: Toshiba

Specifications of TMPR4937XBG-300

• Family Name: TX49
• Device Core Size: 64b
• Frequency (max): 300MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.5V
• Operating Supply Voltage (max): 1.6V
• Operating Supply Voltage (min): 1.4V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 484
• Package Type: BGA
• Lead Free Status / Rohs Status: Compliant

Handling precautions
TMPR4937
1. Overview and Features ........................................................................................................................................... 1-1
2. Configuration.......................................................................................................................................................... 2-1
3. Signals
4. Address Mapping.................................................................................................................................................... 4-1
5. Configuration Registers .......................................................................................................................................... 5-1
6. Clocks
1.1
1.2
2.1
3.1
3.2
3.3
4.1
4.2
5.1
5.2
6.1
6.2
1.2.1
1.2.2
3.1.1
3.1.2
3.1.3
3.1.4
3.1.5
3.1.6
3.1.7
3.1.8
3.1.9
3.1.10
3.1.11
3.1.12
3.1.13
3.1.14
3.1.15
4.2.1
4.2.2
4.2.3
5.1.1
5.2.1
5.2.2
5.2.3
5.2.4
5.2.5
5.2.6
5.2.7
6.2.1
Overview........................................................................................................................................................ 1-1
Features .......................................................................................................................................................... 1-1
TX4937 block diagram .................................................................................................................................. 2-1
Pin Signal Description ................................................................................................................................... 3-1
Boot Configuration ...................................................................................................................................... 3-10
Pin multiplex................................................................................................................................................ 3-14
TX4937 Physical Address Map...................................................................................................................... 4-1
Register Map.................................................................................................................................................. 4-2
Detailed Description ...................................................................................................................................... 5-1
Registers......................................................................................................................................................... 5-2
TX4937 Clock Signals ................................................................................................................................... 6-1
Power-Down Mode ........................................................................................................................................ 6-5
Features of the TX49/H3 core.............................................................................................................. 1-2
Features of TX4937 peripheral functions ............................................................................................ 1-2
Signals Common to SDRAM and External Bus Interfaces.................................................................. 3-1
SDRAM Interface Signals ................................................................................................................... 3-2
External Interface Signals.................................................................................................................... 3-3
DMA Interface Signals ........................................................................................................................ 3-4
PCI Interface Signals ........................................................................................................................... 3-4
Serial I/O Interface Signals.................................................................................................................. 3-6
Timer Interface Signals........................................................................................................................ 3-6
Parallel I/O Interface Signals ............................................................................................................... 3-6
AC-link Interface Signals .................................................................................................................... 3-7
Interrupt Signals................................................................................................................................... 3-7
Extended EJTAG Interface Signals...................................................................................................... 3-8
Clock Signals ....................................................................................................................................... 3-8
Initialization Signal.............................................................................................................................. 3-9
Test Signals.......................................................................................................................................... 3-9
Power Supply Pins ............................................................................................................................... 3-9
Addressing ........................................................................................................................................... 4-2
Ways to Access to Internal Registers ................................................................................................... 4-2
Register Map........................................................................................................................................ 4-3
Detecting G-Bus Timeout .................................................................................................................... 5-1
Chip Configuration Register (CCFG) 0xE000..................................................................................... 5-3
Chip Revision ID Register (REVID) 0xE008...................................................................................... 5-6
Pin Configuration Register (PCFG) 0xE010 ....................................................................................... 5-7
Timeout Error Access Address Register (TOEA) 0xE018 ................................................................ 5-10
Clock Control Register (CLKCTR) 0xE020...................................................................................... 5-11
G-Bus Arbiter Control Register (GARBC) 0xE030........................................................................... 5-13
Register Address Mapping Register (RAMP) 0xE048 ...................................................................... 5-14
Halt Mode and Doze Mode.................................................................................................................. 6-5
............................................................................................................................................................. 3-1
............................................................................................................................................................. 6-1
Table of Contents
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Table of Contents