TMPR4937XBG-300 Toshiba, TMPR4937XBG-300 Datasheet - Page 421

• Manufacturer Part Number: TMPR4937XBG-300
• Manufacturer: Toshiba

Specifications of TMPR4937XBG-300

• Family Name: TX49
• Device Core Size: 64b
• Frequency (max): 300MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.5V
• Operating Supply Voltage (max): 1.6V
• Operating Supply Voltage (min): 1.4V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 484
• Package Type: BGA
• Lead Free Status / Rohs Status: Compliant

14.3.8
14.3.9
Interrupt
AC-link Low-power Mode
down both the controller and CODEC except the minimum circuit to detect modem RING/Caller-ID
event and wake up the system. AC’97 CODEC is required to go into the low-power mode when they
receive a special register-write access. In this mode, the AC-link controller must drive all output signals
to low level to allow the CODEC digital I/O power cut.
Enable Register (ACCTLEN)’s Enable AC-link Low-power Mode (LOWPWR) bit, all the output
signals except the ACRESET* signal to the AC-link are forced to low level.
1 µs or longer by the AC-link controller while the BITCLK signal is inactive. The software is
responsible for controlling the length of this period.
Enable Wake-up (WAKEUP) bit, high-level input at any SDIN[x] signal will force ACLCPME interrupt
assertion.
warm reset to the AC-link via ACCTLEN Register’s Enable Warm Reset (WRESET) bit. After the
warm reset is deasserted, the CODEC will start providing the BITCLK signal, and then ACLC will
generate the SYNC signal for usual AC-link frames.
in AC-link power-down mode.
• ACLC Interrupt
• ACLCPME Interrupt
ACLC generate two kinds of interrupt to the interrupt controller as below.
The AC’97 specification makes provision for saving power during system suspension by powering-
ACLC provides ‘AC-link low-power mode’ setting. When this mode is enabled by ACLC Control
The AC-link will be reactivated out of the low-power mode when the SYNC signal is driven high for
ACLC also provides the ‘wake-up’ function. While this function is enabled by ACCTLEN Register’s
When ACLCPME interrupt is recognized, the software must disable the low-power mode and assert
Refer to section B.5.1 of AC’97 specification revision 2.1 for the power-down and wake-up sequence
connected. Refer to the section 14.4.5.
(WAKEUP) bit in section 14.4.1.
Logical OR of all the valid bits of ACLC Interrupt Masked Status Register (ACINTMSTS) is
This interrupt shows the wake-up from CODEC in AC-link low-power mode.
Refer to the description for ACLC Control Enable Register (ACCTLEN)’s Wake-up Enable
14-15
Chapter 14 AC-link Controller