TMPR4937XBG-300 Toshiba, TMPR4937XBG-300 Datasheet - Page 336

• Manufacturer Part Number: TMPR4937XBG-300
• Manufacturer: Toshiba

Specifications of TMPR4937XBG-300

• Family Name: TX49
• Device Core Size: 64b
• Frequency (max): 300MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.5V
• Operating Supply Voltage (max): 1.6V
• Operating Supply Voltage (min): 1.4V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 484
• Package Type: BGA
• Lead Free Status / Rohs Status: Compliant

63:39
35:24
23:0
Bit
38
37
36
63
47
31
15
10.4.47 P2G Memory Space 1 G-Bus Base Address Register (P2GM1GBASE)
Mnemonic
P2GM1EN
BA[35:24]
BSWAP
EXFER
Reserved
Memory Space 1
Enable
Byte Swap
Endian Transfer
Memory Space
Base Address 1
Reserved
Figure 10.4.45 P2G Memory Space 1 G-Bus Base Address Register
Field Name
BA[31:24]
0x00
R/W
Reserved
Target Memory Space 1 Enable (Default: 0x0) Controls whether Memory
Space 1 for target access is valid or invalid.
When this bit is set to invalid, Writes to the Memory Space 1 Lower Base
Address Register or the Memory Space 1 Upper Base Address Register of
the PCI Configuration Register become invalid. Also, “1” is returned to
Reads as a response.
1: Validates Memory Space 1 for target access.
0: Invalidates Memory Space 1 for target access.
Byte Swap Disable
(Default: Little Endian Mode: 0x1; Big Endian Mode: 0x0) Sets the byte
swapping of Memory Space 1 for target access.
1: Do not perform byte swapping.
0: Perform byte swapping.
Please use the default state in most situations. If this bit is changed to “1”
when in the Big Endian Mode, the byte order of transfer to Memory Space
0 through DWORD (32-bit) access will not change.
Endian Transfer
(Default: Little Endian Mode: 0x0; Big Endian Mode: 0x1)
Sets the Endian Transfer of Memory Space 1 for target access.
1: Performs Endian Transfer.
0: Does not perform Endian Transfer.
Please use the default state.
Base Address 0 (Default: 0x0_0000_00)
Sets the G-Bus base bus address of Memory Space 1 for target access.
Can set the base address in 16-MB units.
24
Reserved
Reserved
10-78
39
23
P2GM1EN
R/W
0x0
38
Description
BSWAP
0x0/0x1 0x1/0x0
R/W
37
Chapter 10 PCI Controller
EXFER
R/W
36
Reserved
35
BA[35:32]
R/W
0x0
0xD188
Read/Write
R/W
R/W
R/W
R/W
48
32
16
0
⎯
⎯
: Type
: Initial value
: Type
: Initial value
: Type
: Initial value
: Type
: Initial value