TMPR4937XBG-300 Toshiba, TMPR4937XBG-300 Datasheet - Page 269

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TMPR4937XBG-300

Manufacturer Part Number
TMPR4937XBG-300
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMPR4937XBG-300

Family Name
TX49
Device Core Size
64b
Frequency (max)
300MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.5V
Operating Supply Voltage (max)
1.6V
Operating Supply Voltage (min)
1.4V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
484
Package Type
BGA
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMPR4937XBG-300
Manufacturer:
TOSHIBA
Quantity:
16 845
Part Number:
TMPR4937XBG-300
Manufacturer:
DSP
Quantity:
81
Memory Space 0 512 MB
Memory Space 1 16 MB
Memory Space 2 1 MB
I/O Space
Figure 10.3.6 Address Conversion for Target (PCI Bus (PCI Bus → G-Bus Address Conversion)
address (GBusAddr[35:0]) is as follows below. GBASE[35:8], and PBASE[39:8] each represent the
setting register of the corresponding access window indicated below in Table 10.3.4. The “&” symbol
indicates a logical AND for each bit, and “|” indicates bit linking.
PCIAddr
PBASE
When expressed as a formula, conversion of a PCI Bus Address (PCIAddr[39:0]) into a G-Bus
Figure 10.3.6 illustrates this address conversion.
256 B
Space
Size
GBusAddr
Memory space 0
Memory space 1
Memory space 2
I/O space
GBASE
If (PCIAddr[39:29] == P2GM0PUBASE.BA[39:32] | P2GM0PLBASE.BA[31:29] then
If (PCIAddr[39:24] == P2GM1PUBASE.BA[39:32] | P2GM1PLBASE.BA[31:24] then
If (PCIAddr[31:20] == P2GM2PBASE.BA[31:20]) then
If (PCIAddr[31:8] == P2GIOPBASE.BA[31:8]) then
Table 10.3.4 Target Access Space Address Mapping Register
39/32
39/32
GBusAddr[35:0] = P2GM0GBASE[35:29] | PCIAddr[28:0];
GBusAddr[35:0] = P2GM1GBASE[35:24] | PCIAddr[23:0];
GBusAddr[35:0] = P2GM2GBASE[35:20] | PCIAddr[19:0];
GBusAddr[35:0] = P2GIOGBASE[35:8] | PCIAddr[7:0];
Address
40-bit
40-bit
32-bit
32-bit
PCI
35
35
Compare
P2GM0PUBASE.BA[39:32] | P2GM0PLBASE.BA[31:29]
P2GM1PUBASE.BA[39:32] | P2GM1PLBASE.BA[31:24]
P2GM2PBASE.BA[31:20]
P2GIOPBASE.BA[31:8]
n = 29 Memory Space 0
n = 24 Memory Space 1
n = 20 Memory Space 2
n = 8
PCI Bus Base Address PBASE
I/O Space
10-11
n n−1
n n−1
n n−1
n n−1
Chapter 10 PCI Controller
P2GM0GBASE.BA[35:29]
P2GM1GBASE.BA[35:24]
P2GM2GBASE.BA[35:20]
P2GIOGBASE.BA[35:8]
G-Bus Base Address
GBASE
0
0
0
0

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