TMPR4937XBG-300 Toshiba, TMPR4937XBG-300 Datasheet - Page 348

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TMPR4937XBG-300

Manufacturer Part Number
TMPR4937XBG-300
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMPR4937XBG-300

Family Name
TX49
Device Core Size
64b
Frequency (max)
300MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.5V
Operating Supply Voltage (max)
1.6V
Operating Supply Voltage (min)
1.4V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
484
Package Type
BGA
Lead Free Status / Rohs Status
Compliant

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63:36
Bits
35:2
1:0
63
47
31
15
10.4.59 PDMAC G-Bus Address Register (PDMGA)
Mnemonic
PDMGA
Reserved
G-Bus Address
Reserved
Field Name
Reserved
Figure 10.4.57 G-Bus Address Register
PDMAC G-Bus Address (Default is undefined)
The G-Bus DMA transfer address is specified by a G-Bus physical address
on a 32-bit address boundary. This register value is used for G-Bus Read
access during DMA transfer from the G-Bus to the PCI Bus, or it is used for
G-Bus Write access during DMA transfer from the PCI Bus to the G-Bus.
This register value is held without being affected by a Reset.
PDMGA[15:2]
Undefined
R/W
PDMGA[31:16]
Undefined
Reserved
R/W
10-90
Description
Chapter 10 PCI Controller
0xD208
36
35
PDMGA[35:32]
Undefined
2
R/W
Reserved
1
Read/Write
R/W
48
32
16
0
: Type
: Initial value
: Type
: Initial value
: Type
: Initial value
: Type
: Initial value

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