TMPR4937XBG-300 Toshiba, TMPR4937XBG-300 Datasheet - Page 308

• Manufacturer Part Number: TMPR4937XBG-300
• Manufacturer: Toshiba

Specifications of TMPR4937XBG-300

• Family Name: TX49
• Device Core Size: 64b
• Frequency (max): 300MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.5V
• Operating Supply Voltage (max): 1.6V
• Operating Supply Voltage (min): 1.4V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 484
• Package Type: BGA
• Lead Free Status / Rohs Status: Compliant

18:16
14:12
10:8
Bit
6:4
2:0
19
15
11
7
3
Mnemonic
ReqWP
ReqDP
ReqXP
ReqYP
ReqZP
Reserved
Request D Port
Reserved
Request W Port
Reserved
Request X Port
Reserved
Request Y Port
Reserved
Request Z Port
Field Name
Figure 10.4.21 PCI Bus Arbiter Request Port Register (2/2)
Request D Port (Default: 100)
Sets the PCI Bus Master that connects to the Internal PCI Bus Arbiter
Request D Port (Master D).
111: Makes the PCI Controller Master D.
110: Reserved
101: Reserved
100: Reserved
011: Makes REQ*[3] Master D.
010: Makes REQ*[2] Master D.
001: Makes REQ*[1] Master D.
000: Makes REQ*[0] Master D.
Request W Port (Default: 011)
Sets the PCI Bus Master that connects to the Internal PCI Bus Arbiter
Request W Port (Master W).
111: Makes the PCI Controller Master W.
110: Reserved
101: Reserved
100: Reserved
011: Makes REQ*[3] Master W.
010: Makes REQ*[2] Master W.
001: Makes REQ*[1] Master W.
000: Makes REQ*[0] Master W.
Request X Port (Default: 010)
Sets the PCI Bus Master that connects to the Internal PCI Bus Arbiter
Request X Port (Port X).
111: Makes the PCI Controller Master X.
110: Reserved
101: Reserved
100: Reserved
011: Makes REQ*[3] Master X.
010: Makes REQ*[2] Master X.
001: Makes REQ*[1] Master X.
000: Makes REQ*[0] Master X.
Request Y Port (Default: 001)
Sets the PCI Bus Master that connects to the Internal PCI Bus Arbiter
Request Y Port (Port Y).
111: Makes the PCI Controller Master Y.
110: Reserved
101: Reserved
100: Reserved
011: Makes REQ*[3] Master Y.
010: Makes REQ*[2] Master Y.
001: Makes REQ*[1] Master Y.
000: Makes REQ*[0] Master Y.
Request Z Port (Default: 000)
Sets the PCI Bus Master that connects to the Internal PCI Bus Arbiter
Request Z Port (Port Z).
111: Makes the PCI Controller Master Z.
110: Reserved
101: Reserved
100: Reserved
011: Makes REQ*[3] Master Z.
010: Makes REQ*[2] Master Z.
001: Makes REQ*[1] Master Z.
000: Makes REQ*[0] Master Z.
10-50
Description
Chapter 10 PCI Controller
Read/Write
R/W
R/W
R/W
R/W
R/W
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