NH82801GR S L8FY Intel, NH82801GR S L8FY Datasheet - Page 85

• Manufacturer Part Number: NH82801GR S L8FY
• Manufacturer: Intel

Specifications of NH82801GR S L8FY

• Lead Free Status / RoHS Status: Compliant

Host Bridge Registers (Device 0, Function 0)
4.3.5
4.3.6
Intel® 3000 and 3010 Chipset Memory Controller Hub (MCH) Datasheet
EPLE2A—EP Link Entry 2 Address
MMIO Range:
Address Offset:
Default Value:
Access:
Size:
Second part of a Link Entry, which declares an internal link to another Root Complex
Element.
EPLE3D-EP Link Entry 3 Description
MMIO Range:
Address Offset:
Default Value:
Access:
Size:
This register provides the first part of a Link Entry, which declares an internal link to
another Root Complex Element.
63:28
27:20
19:15
14:12
31:24
23:16
15:2
11:0
Bit
Bit
Bit
1
0
Access &
Access &
Default
Default
Access &
0 0001 b
R/WO
Default
R/WO
03 h
00 h
1 b
0 b
000 b
RO
RO
00 h
RO
RO
RO
Reserved
Link Type
Indicates that the link points to configuration space of the integrated device which
controls the root port. The link address specifies the configuration address
(segment, bus, device, function) of the target root port.
Link Valid
0: Link Entry is not valid and will be ignored.
1: Link Entry specifies a valid link.
Target Port Number
Specifies the port number associated with the element targeted by this link entry
(PCI Express). The target port number is with respect to the component that
contains this element as specified by the target component ID.
Target Component ID
Identifies the physical or logical component that is targeted by this link entry. A
value of 0 is reserved; Component IDs start at 1.
This value is a mirror of the value in the Component ID field of all elements in this
component. The value only needs to be written in one of the mirrored fields and it
will be reflected everywhere that it is mirrored.
Reserved
Bus Number
Device Number
Target for this link is PCI Express port (Device 1).
Function Number
Reserved
EPBAR
068-06Fh
00000000_00008000h
RO, R/WO
64 bits
EPBAR
070-073h
03000002h
RO, R/WO
32 bits
Description
Description
Description
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