NH82801GR S L8FY Intel, NH82801GR S L8FY Datasheet - Page 21

• Manufacturer Part Number: NH82801GR S L8FY
• Manufacturer: Intel

Specifications of NH82801GR S L8FY

• Lead Free Status / RoHS Status: Compliant

Signal Description
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Note:
Intel® 3000 and 3010 Chipset Memory Controller Hub (MCH) Datasheet
Signal Description
This section provides a detailed description of MCH signals. The signals are arranged in
functional groups according to their associated interface.
Throughout this chapter, the symbol “†” indicates a signal that is Reserved on the
Intel® 3000 chipset but is used by Intel® 3010 chipset.
The following notations are used to describe the signal type:
PCIE
DMI
CMOS
COD
HCSL
HVCMOS
HVIN
SSTL-1.8
A
PCI Express interface signals. These signals are compatible with PCI
Express 1.0 Signaling Environment AC Specifications and are AC
coupled. The buffers are not 3.3 V tolerant. Differential voltage spec =
(|D+ - D-|) * 2 = 1.2 Vmax. Single-ended maximum = 1.5 V. Single-
ended minimum = 0 V.
Direct Media Interface signals. These signals are compatible with PCI
Express 1.0 Signaling Environment AC Specifications, but are DC
coupled. The buffers are not 3.3 V tolerant. Differential voltage spec =
(|D+ - D-|) * 2 = 1.2 Vmax. Single-ended maximum = 1.5 V. Single-
ended minimum = 0 V.
CMOS buffers. 1.5 V tolerant.
CMOS Open Drain buffers. 2.5 V tolerant.
Host Clock Signal Level buffers. Current mode differential pair.
Differential typical swing = (|D+ - D-|) * 2 = 1.4 V. Single ended input
tolerant from -0.35 V to 1.2 V. Typical crossing voltage 0.35 V.
High Voltage CMOS buffers. 2.5 V tolerant.
High Voltage CMOS input-only buffers. 3.3 V tolerant.
Stub Series Termination Logic. These are 1.8 V output capable buffers.
1.8 V tolerant.
Analog reference or output. These signals may be used as a threshold
voltage or for buffer compensation.
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