NH82801GR S L8FY Intel, NH82801GR S L8FY Datasheet - Page 151
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NH82801GR S L8FY
Manufacturer Part Number
NH82801GR S L8FY
Description
Manufacturer
Intel
Datasheet
1.NH82801GR_S_L8FY.pdf
(218 pages)
Specifications of NH82801GR S L8FY
Lead Free Status / RoHS Status
Compliant
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System Address Map
8.3
Note:
Intel® 3000 and 3010 Chipset Memory Controller Hub (MCH) Datasheet
PCI Memory Address Range (TOLUD to 4 GB)
This address range (see
normally mapped via the DMI to PCI.
Exceptions to this mapping include the BAR memory mapped regions. Which include:
The AGP Aperture no longer exists with PCI Express.
1. EPBAR, MCHBAR, DMIBAR.
2. The second exception to the mapping rule deals with the PCI Express port:
• The exceptions listed above for PCI Express ports MUST NOT overlap with APCI
Configuration, FSB Interrupt Space and High BIOS Address Range.
— Addresses decoded to the Primary PCI Express Memory Window defined by the
— Addresses decoded to the Secondary PCI Express Memory Window defined by
— Addresses decoded to PCI Express Configuration Space are mapped based on
MBASE1, MLIMIT1, PMBASE1, and PMLIMIT1 registers are mapped to PCI
Express.
the MBASE3, MLIMIT3, PMBASE3, and PMLIMIT3 registers are mapped to PCI
Express.
Bus, Device, and Function number. (PCIEXBAR range).
Table
8-4), from the top of physical memory to 4 GB is
151
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