NH82801GR S L8FY Intel, NH82801GR S L8FY Datasheet - Page 162

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NH82801GR S L8FY

Manufacturer Part Number
NH82801GR S L8FY
Description
Manufacturer
Intel
Datasheet

Specifications of NH82801GR S L8FY

Lead Free Status / RoHS Status
Compliant
9.2.2
9.2.2.1
162
DRAM Control (CxDRC0): The x represents a channel, A or B represented by 0 and 1
respectively. DRAM refresh mode, rate, and other controls are selected here.
DRAM Technologies and Organization
“Single sided” below is a logical term referring to the number of Chip Selects attached
to the DIMM. A real DIMM may put the components on both sides of the substrate, but
be logically indistinguishable from single sided DIMM if all components on the DIMM are
attached to the same Chip Select signal.
All standard 256 Mb, 512 Mb, and 1 Gb technologies and addressing are supported for
x16 and x8 devices.
For DDR2
No support for DIMMs with different technologies or capacities on opposite sides of the
same DIMM. If one side of a DIMM is populated, the other side is either identical or
empty.
The DRAM sub-system supports single or dual channels, 64b or 72b wide per channel.
There can be a maximum of 4 ranks populated (2 Double Sided DIMMs) per channel.
Mixed mode DDR DS-DIMMs (x8 and x16 on the same DIMM) are not supported.
By using 1 Gb technology, the largest memory capacity is 8 GB (16K rows * 1K
columns * 1 cell/(row * column) * 8 b/cell * 8 banks/device * 8 devices/rank * 4
ranks/channel * 2 channel *1M/(K*K) * 1G/1024M * 1B/8b = 8 GB). Using 8 GB of
memory is only possible in Interleaved mode with all ranks populated at maximum
capacity.
By using 256Mb technology, the smallest memory capacity is 128 MB (8K rows * 512
columns * 1 cell/(row * column) * 16b/cell * 4 banks/device * 4 devices/rank * 1 rank
* 1M/1024K * 1B/8b = 128 MB)
Rules for Populating DIMM Slots
In all modes, the frequency of System Memory will be the lowest frequency of all
DIMMs in the system, as determined through the SPD registers on the DIMMs.
In the Single Channel mode, any DIMM slot within the channel may be populated in any
order. Either channel may be used. To save power, do not populate the unused channel.
In Dual Channel Asymmetric mode, any DIMM slot may be populated in any order.
In Dual Channel Interleaved mode, any DIMM slot may be populated in any order, but
the total memory in each channel must be the same.
• x8 means that each component has 8 data lines
• x16 means that each component has 16 data lines
• 533 (PC 4300) ECC
• 667 (PC 5300) ECC
— Version A = Single sided x8
— Version B = Double sided x8
— Version F = Single sided x8
— Version G = Double sided x8
Intel® 3000 and 3010 Chipset Memory Controller Hub (MCH) Datasheet
Functional Description

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