NH82801GR S L8FY Intel, NH82801GR S L8FY Datasheet - Page 160

• Manufacturer Part Number: NH82801GR S L8FY
• Manufacturer: Intel

Specifications of NH82801GR S L8FY

• Lead Free Status / RoHS Status: Compliant

9.1.4.1
9.2
Table 9-1.
Table 9-2.
160
APIC Cluster Mode Support
This is required for backwards compatibility with existing software, including various
operating systems. As an example, beginning with Microsoft Windows* 2000 there is a
mode (boot.ini) that allows an end user to enable the use of cluster addressing support
of the APIC.
System Memory Controller
The system memory controller supports two styles of memory organization
(Interleaved and Asymmetric). Rules for populating DIMM slots are included in this
chapter. Sample memory organizations are provided in
Sample System Memory Organization with Interleaved Channels
Sample System Memory Organization with Asymmetric Channels
Interleaved Mode
This mode provides maximum performance on real applications. Addresses are ping-
ponged between the channels, and the switch happens after each cache line (64 byte
boundary). If two consecutive cache lines are requested, both may be retrieved
simultaneously, since they are on opposite channels. The drawbacks of Interleaved
Mode are that the system designer must populate both channels of memory such that
they have equal capacity, but the technology and device width may vary from one
channel to the other.
Enhanced Channel Interleaving
Transactions are issued to both channels simultaneously.
• The MCH supports three types of interrupt re-direction:
— Physical
— Flat-Logical
— Clustered-Logical
Rank 3
Rank 2
Rank 1
Rank 0
Rank 3
Rank 2
Rank 1
Rank 0
Population
Population
Channel A
Channel A
256 MB
512 MB
512 MB
256 MB
512 MB
512 MB
0 MB
0 MB
Intel® 3000 and 3010 Chipset Memory Controller Hub (MCH) Datasheet
Cumulative Top
Cumulative Top
Address in
Address in
Channel A
Channel A
2560 MB
2560 MB
2048 MB
1024 MB
1280 MB
1280 MB
1024 MB
512 MB
Table 9-1
Population
Population
Channel B
Channel B
256 MB
512 MB
512 MB
256 MB
512 MB
512 MB
0 MB
0 MB
and
Functional Description
Table
Cumulative Top
Cumulative Top
Address in
Address in
Channel B
Channel B
2560 MB
2560 MB
2048 MB
1024 MB
2560 MB
2560 MB
2304 MB
1792 MB
9-2.