NH82801GR S L8FY Intel, NH82801GR S L8FY Datasheet - Page 81

• Manufacturer Part Number: NH82801GR S L8FY
• Manufacturer: Intel

Specifications of NH82801GR S L8FY

• Lead Free Status / RoHS Status: Compliant

Host Bridge Registers (Device 0, Function 0)
4.2.23
4.2.24
Intel® 3000 and 3010 Chipset Memory Controller Hub (MCH) Datasheet
PMCFG—Power Management Configuration
PCI Device:
Address Offset:
Default Value:
Access:
Size:
PMSTS—Power Management Status
PCI Device:
Address Offset:
Default Value:
Access:
Size:
This register is Reset by PWROK only.
31:5
31:2
3:0
Bit
Bit
4
1
0
Access &
Access &
Default
Default
R/WC/S
R/WC/S
R/W
0 b
0 b
0 b
Reserved
Enhanced Power Management Features Enable
Reserved
Reserved
Channel B in self-refresh
Set by power management hardware after Channel B is placed in self refresh as a
result of a Power State or a Reset Warn sequence,
Cleared by Power management hardware before starting Channel B self refresh exit
sequence initiated by a power management exit.
Cleared by the BIOS in a warm reset (Reset# asserted while PWROK is asserted)
exit sequence.
Channel A in Self-refresh
Set by power management hardware after Channel A is placed in self refresh as a
result of a Power State or a Reset Warn sequence,
Cleared by Power management hardware before starting Channel A self refresh exit
sequence initiated by a power management exit.
Cleared by the BIOS in a warm reset (Reset# asserted while PWOK is asserted) exit
sequence.
0: Legacy power management mode
1: Reserved.
0: Channel B not ensured to be in self-refresh.
1: Channel B in Self-Refresh.
0: Channel A not ensured to be in self-refresh.
1: Channel A in Self-Refresh.
MCHBAR
F10-F13h
00000000h
R/W
32 bits
MCHBAR
F14-F17h
00000000h
R/WC/S
32 bits
Description
Description
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