NH82801GR S L8FY Intel, NH82801GR S L8FY Datasheet - Page 138
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NH82801GR S L8FY
Manufacturer Part Number
NH82801GR S L8FY
Description
Manufacturer
Intel
Datasheet
1.NH82801GR_S_L8FY.pdf
(218 pages)
Specifications of NH82801GR S L8FY
Lead Free Status / RoHS Status
Compliant
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7.1.6
7.1.7
138
DMIVC0RCTL0—DMI VC0 Resource Control
MMIO Range:
Address Offset:
Default Value:
Access:
Size:
Controls the resources associated with PCI Express Virtual Channel 0.
DMIVC0RSTS—DMI VC0 Resource Status
MMIO Range:
Address Offset:
Default Value:
Access:
Size:
Reports the Virtual Channel specific status.
30:27
26:24
23:20
19:17
16:8
15:2
7:1
Bit
Bit
31
0
1
0
Access &
Access &
Default
Default
000 b
7F h
R/W
R/W
RO
1 b
RO
0 h
RO
1 b
Virtual Channel Enable (EN)
Enables the VC when set. Disables the VC when cleared.
Reserved
Virtual Channel Identifier (ID)
Indicates the ID to use for this virtual channel.
Reserved
Port Arbitration Select (PAS)
Indicates which port table is being programmed. The root complex takes no action
on this setting since the arbitration is fixed and there is no arbitration table.
Reserved
Transaction Class / Virtual Channel Map (TVM) — RW. Indicates which
transaction classes are mapped to this virtual channel. When a bit is set, this
transaction class is mapped to the virtual channel.
Reserved
Reserved
VC Negotiation Pending (NP)
When set, indicates the virtual channel is still being negotiated with ingress ports.
Reserved
DMIBAR
014h
800000FEh
RO, R/W
32 bits
DMIBAR
01Ah
0002h
RO
16 bits
Intel® 3000 and 3010 Chipset Memory Controller Hub (MCH) Datasheet
Description
Description
Direct Media Interface (DMI) RCRB
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