NH82801GR S L8FY Intel, NH82801GR S L8FY Datasheet - Page 79

• Manufacturer Part Number: NH82801GR S L8FY
• Manufacturer: Intel

Specifications of NH82801GR S L8FY

• Lead Free Status / RoHS Status: Compliant

Host Bridge Registers (Device 0, Function 0)
4.2.12
4.2.13
4.2.14
4.2.15
4.2.16
4.2.17
Intel® 3000 and 3010 Chipset Memory Controller Hub (MCH) Datasheet
C1DRB0—Channel B DRAM Rank Boundary Address 0
MMIO Range:
Address Offset:
Default Value:
Access:
Size:
The operation of this register is detailed in the description for register C0DRB0.
C1DRB1—Channel B DRAM Rank Boundary Address 1
MMIO Range:
Address Offset:
Default Value:
Access:
Size:
The operation of this register is detailed in the description for register C0DRB0.
C1DRB2—Channel B DRAM Rank Boundary Address 2
MMIO Range:
Address Offset:
Default Value:
Access:
Size:
The operation of this register is detailed in the description for register C0DRB0.
C1DRB3—Channel B DRAM Rank Boundary Address 3
MMIO Range:
Address Offset:
Default Value:
Access:
Size:
The operation of this register is detailed in the description for register C0DRB0.
C1DRA0—Channel B DRAM Rank 0,1 Attribute
MMIO Range:
Address Offset:
Default Value:
Access:
Size:
The operation of this register is detailed in the description for register C0DRA0.
C1DRA2—Channel B DRAM Rank 2,3 Attribute
MMIO Range:
Address Offset:
Default Value:
Access:
Size:
The operation of this register is detailed in the description for register C0DRA0.
MCHBAR
180h
00h
R/W
8 bits
MCHBAR
181h
00h
R/W
8 bits
MCHBAR
182h
00h
R/W
8 bits
MCHBAR
183h
00h
R/W
8 bits
MCHBAR
188h
00h
R/W
8 bits
MCHBAR
189h
00h
R/W
8 bits
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