NH82801GR S L8FY Intel, NH82801GR S L8FY Datasheet - Page 140
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NH82801GR S L8FY
Manufacturer Part Number
NH82801GR S L8FY
Description
Manufacturer
Intel
Datasheet
1.NH82801GR_S_L8FY.pdf
(218 pages)
Specifications of NH82801GR S L8FY
Lead Free Status / RoHS Status
Compliant
- Current page: 140 of 218
- Download datasheet (4Mb)
7.1.10
7.1.11
140
DMIVC1RSTS—DMI VC1 Resource Status
MMIO Range:
Address Offset:
Default Value:
Access:
Size:
Reports the Virtual Channel specific status.
DMILCAP—DMI Link Capabilities
MMIO Range:
Address Offset:
Default Value:
Access:
Size:
Indicates DMI specific capabilities.
31:18
17:15
14:12
11:10
15:2
9:4
3:0
Bit
Bit
1
0
Access &
Access &
Default
Default
R/WO
010 b
R/WO
010 b
11 b
RO
0 b
RO
RO
4 h
RO
1 h
Reserved
VC Negotiation Pending (NP)
When set, indicates the virtual channel is still being negotiated with ingress ports.
Reserved
Reserved
L1 Exit Latency (EL1)
L1 not supported on DMI.
L0s Exit Latency (EL0)
This field indicates that exit latency is 128 ns to less than 256 ns.
Active State Link PM Support (APMS)
Indicates that L0s is supported on DMI.
Maximum Link Width (MLW)
Indicates the maximum link width is 4 ports.
Maximum Link Speed (MLS)
Indicates the link speed is 2.5 Gb/s.
DMIBAR
026h
0000h
RO
16 bits
DMIBAR
084h
00012C41h
RO, R/WO
32 bits
Intel® 3000 and 3010 Chipset Memory Controller Hub (MCH) Datasheet
Description
Description
Direct Media Interface (DMI) RCRB
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