NH82801GR S L8FY Intel, NH82801GR S L8FY Datasheet - Page 135
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NH82801GR S L8FY
Manufacturer Part Number
NH82801GR S L8FY
Description
Manufacturer
Intel
Datasheet
1.NH82801GR_S_L8FY.pdf
(218 pages)
Specifications of NH82801GR S L8FY
Lead Free Status / RoHS Status
Compliant
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Direct Media Interface (DMI) RCRB
7
Table 7-1.
Intel® 3000 and 3010 Chipset Memory Controller Hub (MCH) Datasheet
Direct Media Interface (DMI)
RCRB
This Root Complex Register Block (RCRB) controls the MCH-to-ICH7 serial interconnect.
The base address of this space is programmed in DMIBAR in device #0 config space.
Table 7-1
ascending order.
IMPORTANT: All RCRB register spaces needs to remain organized as they are here.
DMI Register Address Map
000–003h
004–007h
008–00Bh
00C–00Dh
00E–00Fh
010–013h
014–017h
018–019h
01A–01B h
01C–01F h
020–023h
024–025h
026–027h
028–083h
084–087h
088–089h
08A–08Bh
08C– 1C7h
1C8–1CBh
1CC– FFFh
Address
Offset
provides an address map of the DMI registers listed in by address offset in
DMIPVCCAP1
DMIPVCCAP2
DMIVC0RCAP
DMIVC0RCTL
DMIVC0RSTS
DMIVC1RCAP
DMIVC1RCTL
DMIVC1RSTS
DMIPVCCTL
DMIUEMSK
DMIVCECH
DMILCAP
DMILSTS
DMILCTL
Symbol
Section 7.1
—
—
—
—
—
—
DMI Virtual Channel Enhanced Capability
Header
DMI Port VC Capability Register 1
DMI Port VC Capability Register 2
DMI Port VC Control
Reserved
DMI VC0 Resource Capability
DMI VC0 Resource Control
Reserved
DMI VC0 Resource Status
DMI VC1 Resource Capability
DMI VC1 Resource Control
Reserved
DMI VC1 Resource Status
Reserved
DMI Link Capabilities
DMI Link Control
DMI Link Status
Reserved
DMI Uncorrectable Error Mask
Reserved
provides a detailed bit description of the registers.
Register Name
PCI Dev #
DMIBAR
DMIBAR
DMIBAR
DMIBAR
DMIBAR
DMIBAR
DMIBAR
DMIBAR
DMIBAR
DMIBAR
DMIBAR
DMIBAR
DMIBAR
DMIBAR
—
—
—
—
—
—
RO, R/W/S
RO, R/WO
RO, R/W
RO, R/W
Access
R/W
RO
RO
RO
RO
RO
RO
RO
RO
RO
—
—
—
—
—
—
135
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