NH82801GR S L8FY Intel, NH82801GR S L8FY Datasheet - Page 136

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NH82801GR S L8FY

Manufacturer Part Number
NH82801GR S L8FY
Description
Manufacturer
Intel
Datasheet

Specifications of NH82801GR S L8FY

Lead Free Status / RoHS Status
Compliant
7.1
7.1.1
7.1.2
136
DMI RCRB Configuration Register Details
DMIVCECH—DMI Virtual Channel Enhanced Capability
Header
MMIO Range:
Address Offset:
Default Value:
Access:
Size:
Indicates DMI Virtual Channel capabilities.
DMIPVCCAP1—DMI Port VC Capability Register 1
MMIO Range:
Address Offset:
Default Value:
Access:
Size:
Describes the configuration of Virtual Channels associated with this port.
31:20
19:16
31:12
11:10
15:0
9:8
6:4
2:0
Bit
Bit
7
3
Access &
Access &
Default
Default
0002 h
140 h
000 b
R/WO
001 b
RO
RO
1 h
RO
00b
00b
RO
RO
RO
Pointer to Next Capability
Indicates the next item in the list.
Capability Version
Indicates support as a version 1 capability structure.
Capability ID
Indicates this is the Virtual Channel capability item.
Reserved
Port Arbitration Table Entry Size (PATS)
Indicates the size of the port arbitration table is 4 bits (to allow up to 8 ports).
Reference Clock (RC)
Fixed at 10 ns.
Reserved
Low Priority Extended VC Count (LPEVC) — Indicates that there are no
additional VCs of low priority with extended capabilities.
Reserved
Extended VC Count
Indicates that there is one additional VC (VC1) that exists with extended
capabilities.
DMIBAR
000h
14010002h
RO
32 bits
DMIBAR
004h
00000001h
RO
32 bits
Intel® 3000 and 3010 Chipset Memory Controller Hub (MCH) Datasheet
Description
Description
Direct Media Interface (DMI) RCRB

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