NH82801GR S L8FY Intel, NH82801GR S L8FY Datasheet - Page 55

• Manufacturer Part Number: NH82801GR S L8FY
• Manufacturer: Intel

Specifications of NH82801GR S L8FY

• Lead Free Status / RoHS Status: Compliant

Host Bridge Registers (Device 0, Function 0)
4.1.15
Intel® 3000 and 3010 Chipset Memory Controller Hub (MCH) Datasheet
DMIBAR—Root Complex Register Range Base Address
(D0:F0)
PCI Device:
Address Offset:
Default Value:
Access:
Size:
This is the base address for the Root Complex configuration space. This window of
addresses contains the Root Complex Register set for the PCI Express hierarchy
associated with the MCH. There is no physical memory within this 4 KB window that can
be addressed. The 4 KB reserved by this register does not alias to any PCI 2.3
compliant memory mapped space.
On reset, this register is disabled and must be enabled by writing a 1 to the DMIBAREN
in this register.
31:12
11:1
Bit
0
Access &
Default
00000 h
R/W
R/W
0b
DMI Base Address:
This field corresponds to bits 31 to 12 of the base address DMI configuration
space.
BIOS will program this register resulting in a base address for a 4 KB block of
contiguous memory address space. This register ensures that a naturally aligned
4 KB space is allocated within total addressable memory space of 8 GB.
System Software uses this base address to program the DMI register set.
Reserved
DMIBAR Enable (DMIBAREN):
0
4C-4Fh
00000000h
R/W
32 bits
0: DMIBAR is disabled and does not claim any memory
1: DMIBAR memory mapped accesses are claimed and decoded appropriately
Description
55