NH82801GR S L8FY Intel, NH82801GR S L8FY Datasheet - Page 34

• Manufacturer Part Number: NH82801GR S L8FY
• Manufacturer: Intel

Specifications of NH82801GR S L8FY

• Lead Free Status / RoHS Status: Compliant

3.1
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Register Terminology
The following table shows the register-related terminology that is used.
R/WSC/L
R/WC/S
RS/WC
R/WSC
R/W/L
R/W/S
R/WC
R/WO
Item
RO/S
R/W
RO
W
Read Only bit(s). Writes to these bits have no effect.
Read Only / Sticky. Writes to these bits have no effect. These are status bits only. Bits are
not returned to their default values by “warm” reset, but will be reset with a cold/
complete reset (for PCI Express related bits, a cold reset is “Power Good Reset” as
defined in the PCI Express specification).
Read Set / Write Clear bit(s). These bits are set to ‘1’ when read and then will continue to
remain set until written. A write of ‘1’ clears (sets to ‘0’) the corresponding bit(s) and a
write of ‘0’ has no effect.
Read / Write bit(s). These bits can be read and written.
Read / Write Clear bit(s). These bits can be read. Internal events may set this bit. A write
of ‘1’ clears (sets to ‘0’) the corresponding bit(s) and a write of ‘0’ has no effect.
Read / Write Clear / Sticky bit(s). These bits can be read. Internal events may set this bit.
A write of ‘1’ clears (sets to ‘0’) the corresponding bit(s) and a write of ‘0’ has no effect.
Bits are not cleared by “warm” reset, but will be reset with a cold/complete reset (for PCI
Express related bits a cold reset is “Power Good Reset” as defined in the PCI Express
Specification).
Read / Write / Lockable bit(s). These bits can be read and written. Additionally, there is a
bit (which may or may not be a bit marked R/W/L) that, when set, prohibits this bit field
from being writeable (bit field becomes Read Only).
Read / Write / Sticky bit(s). These bits can be read and written. Bits are not cleared by
“warm” reset, but will be reset with a cold/complete reset (for PCI Express related bits a
cold reset is “Power Good Reset” as defined in the PCI Express Specification).
Read / Write Self Clear bit(s). These bits can be read and written. When the bit is ‘1’,
hardware may clear the bit to ‘0’ based upon internal events, possibly sooner than any
subsequent read could retrieve a ‘1’.
Read / Write Self Clear / Lockable bit(s). These bits can be read and written. When the bit
is ‘1’, hardware may clear the bit to ‘0’ based upon internal events, possibly sooner than
any subsequent read could retrieve a ‘1’. Additionally there is a bit (which may or may not
be a bit marked R/W/L) that, when set, prohibits this bit field from being writeable (bit
field becomes Read Only).
Write Once bit(s). Once written, bits with this attribute become Read Only. These bits can
only be cleared by a Reset.
Write Only. Whose bits may be written, but will always-return zeros when read. They are
used for write side effects. Any data written to these registers cannot be retrieved.
Intel® 3000 and 3010 Chipset Memory Controller Hub (MCH) Datasheet
Description
MCH Register Description