NH82801GR S L8FY Intel, NH82801GR S L8FY Datasheet - Page 133

• Manufacturer Part Number: NH82801GR S L8FY
• Manufacturer: Intel

Specifications of NH82801GR S L8FY

• Lead Free Status / RoHS Status: Compliant

Host-PCI Express Bridge Registers (D3:F0) (Intel® 3010 Chipset only)
6.1.3
Intel® 3000 and 3010 Chipset Memory Controller Hub (MCH) Datasheet
LSTS3—Link Status (D3:F0)
PCI Device:
Address Offset:
Default Value:
Access:
Size:
Indicates PCI Express link status.
15:13
9:4
3:0
Bit
12
11
10
Access &
Default
00 h
1 b
0 b
0 b
1 h
RO
RO
RO
RO
RO
Reserved
Slot Clock Configuration
0: The device uses an independent clock irrespective of the presence of a reference
1: The device uses the same physical reference clock that the platform provides on
Link Training
Indicates that Link training is in progress. Hardware clears this bit once Link training
is complete.
Training Error
This bit is set by hardware upon detection of unsuccessful training of the Link to the
L0 Link state.
Negotiated Width
Indicates negotiated link width
00h:Reserved
01h:x1
04h:x4
08h:x8
10h:Reserved
All other encodings are reserved.
Negotiated Speed
Indicates negotiated link speed.
1h:2.5 Gb/s
All other encodings are reserved.
on the connector.
the connector.
3
B2h
1001h
RO
16 bits
Description
133