NH82801GR S L8FY Intel, NH82801GR S L8FY Datasheet - Page 152

• Manufacturer Part Number: NH82801GR S L8FY
• Manufacturer: Intel

Specifications of NH82801GR S L8FY

• Lead Free Status / RoHS Status: Compliant

Figure 8-4.
8.3.1
152
PCI Memory Address Range
APIC Configuration Space (FEC0_0000h-FECF_FFFFh)
This range is reserved for APIC configuration space. The I/O APIC(s) usually reside in
the ICH7 portion of the chipset, but can also exist as stand-alone components.
The IOAPIC spaces are used to communicate with IOAPIC interrupt controllers that
may be populated in the system. Since it is difficult to relocate an interrupt controller
using plug-and-play software, fixed address decode regions have been allocated for
them. Processor accesses to the default IOAPIC region (FEC0_0000h to FEC7_FFFFh)
are always forwarded to DMI.
FFFF_FFFFh
FED0_0000h
FEC8_0000h
FEC0_0000h
FFE0_0000h
FEF0_0000h
FEE0_0000h
F000_0000h
E000_0000h
(subtractive decode)
(subtractive decode)
(subtractive decode)
Configuration Space
(subtractive decode)
Local (processor)
FSB Interrupts
DMI Interface
DMI Interface
DMI Interface
PCI Express*
DMI Interface
High BIOS
I/O APIC
APIC
Intel® 3000 and 3010 Chipset Memory Controller Hub (MCH) Datasheet
4 GB
4 GB – 2 MB
4 GB – 17 MB
4 GB – 18 MB
4 GB – 19 MB
4 GB – 20 MB
4 GB – 256 MB
4 GB – 512 MB
TOLUD
Express* Port could
Possible address range
Programmable
windows, PCI
be here
(Not fixed)
Optional HSEG
FEDA_0000h to
FEDB_FFFFh
System Address Map