NH82801GR S L8FY Intel, NH82801GR S L8FY Datasheet - Page 141
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NH82801GR S L8FY
Manufacturer Part Number
NH82801GR S L8FY
Description
Manufacturer
Intel
Datasheet
1.NH82801GR_S_L8FY.pdf
(218 pages)
Specifications of NH82801GR S L8FY
Lead Free Status / RoHS Status
Compliant
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Direct Media Interface (DMI) RCRB
7.1.12
7.1.13
Intel® 3000 and 3010 Chipset Memory Controller Hub (MCH) Datasheet
DMILCTL—DMI Link Control
MMIO Range:
Address Offset:
Default Value:
Access:
Size:
Allows control of DMI.
DMILSTS—DMI Link Status
MMIO Range:
Address Offset:
Default Value:
Access:
Size:
This register indicates DMI status.
15:10
15:8
6:2
1:0
9:4
3:0
Bit
Bit
7
Access &
Access &
Default
Default
R/W
R/W
00 b
00 h
0 h
1 h
RO
RO
Reserved
Extended Synch (ES)
When set, forces extended transmission of FTS ordered sets when exiting L0s prior
to entering L0 and extra TS1 sequences at exit from L1 prior to entering L0.
Reserved
Active State Link PM Control (APMC)
Indicates whether DMI should enter L0s.
00 = Disabled
01 = L0s entry enabled
10 = Reserved
11 = Reserved
Reserved
Negotiated Link Width (NLW)
Negotiated link width is x4 (000100b).
Link Speed (LS)
Link is 2.5 Gb/s.
DMIBAR
088h
0000h
R/W
16 bits
DMIBAR
08Ah
0001h
RO
16 bits
Description
Description
141
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